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기능 8-Bit CMOS ROM Based Microcontroller
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COPCH842C 데이터시트, 핀배열, 회로
August 2000
COP820C/840C Family
8-Bit CMOS ROM Based Microcontrollers with 1k or 2k
Memory
General Description
Note: COP8SA devices are instruction set and pinout com-
patible supersets of the COP800C Family devices, and are
replacements for these in new designs when possible.
The COP820C/840C Family ROM based microcontrollers
are integrated COP8Base core devices with smaller
memory (1k/2k), and fewer on-board features. These single-
chip CMOS devices are suited for lower-functionality appli-
cations where system cost is of prime consideration. Pin and
software compatible (different VCC range) 4k/32k OTP ver-
sions are available (COP87LxxCJ/RJ Family). Erasable win-
dowed versions are available for use with a range of COP8
software and hardware development tools.
Family features include an 8-bit memory mapped architec-
ture, 10 Hz CKI with 1µs instruction cycle, one multi-function
16-bit timer/counter with PWM, MICROWIRE/PLUSserial
I/O, power saving HALT mode, three clock modes, high cur-
rent outputs, software selectable I/O options, 2.3v-6.0v op-
eration and 20/28 pin packages.
Devices included in this datasheet are:
Device
COP620C
COP820C
COP920C
COP622C
COP822C
COP922C
COP640C
COP840C
COP940C
COP642C
COP842C
COP942C
Memory (bytes)
1k ROM
1k ROM
1k ROM
RAM
(bytes)
64
64
64
I/O Pins
24
24
24
Packages
28 DIP/SOIC
28 DIP/SOIC
28 DIP/SOIC
1k ROM
1k ROM
1k ROM
64 16 20 DIP/SOIC
64 16 20 DIP/SOIC
64 16 20 DIP/SOIC
2k ROM
2k ROM
2k ROM
128 24 28 DIP/SOIC
128 24 28 DIP/SOIC
128 24 28 DIP/SOIC
2k ROM
2k ROM
2k ROM
128 16 20 DIP/SOIC
128 16 20 DIP/SOIC
128 16 20 DIP/SOIC
Temperature
-55 to +125˚C
-40 to +85˚C
0 to +70˚C
-55 to +125˚C
-40 to +85˚C
0 to +70˚C
-55 to +125˚C
-40 to +85˚C
0 to +70˚C
-55 to +125˚C
-40 to +85˚C
0 to +70˚C
Comments
4.5v - 5.5v
2.3v-4.0v,
CH=4.0v-6.0v
4.5v - 5.5v
2.3v-4.0v,
CH=4.0v-6.0v
4.5v - 5.5v
2.3v-4.0v,
CH=4.0v-6.0v
4.5v - 5.5v
2.3v-4.0v,
CH=4.0v-6.0v
Key Features
n 16-bit multi-function timer supporting
— PWM mode
— External event counter mode
— Input capture mode
n 1024 bytes ROM/64 bytes RAM-COP820C
n 2048 bytes ROM/128 bytes RAM-COP840C
I/O Features
n Memory mapped I/O
n Software selectable I/O options (TRI-STATE® Output,
Push-Pull Output, Weak Pull-Up Input, High Impedance
Input)
n High current outputs
n Schmitt trigger inputs on Port G
n MICROWIRE/PLUS serial I/O
n Packages:
— 20 DIP/SO with 16 I/O pins
— 28 DIP/SO with 24 I/O pins
CPU/Instruction Set Feature
n 1 µs instruction cycle time
n Three multi-source interrupts servicing
— External interrupt with selectable edge
— Timer interrupt
— Software interrupt
n Versatile and easy to use instruction set
n 8-bit Stack point (SP) — stack in RAM
n Two 8-bit Register Indirect Memory Pointers (B, X)
Fully Static CMOS
n Low current drain (typically < 1 µA)
n Single supply operation: 2.5V to 6.0V
TRI-STATE® is a registered trademark of National Semiconductor Corporation.
COP8, MICROWIREand MICROWIRE/PLUSare trademarks of National Semiconductor Corporation.
© 2000 National Semiconductor Corporation DS009103
www.national.com




COPCH842C pdf, 반도체, 판매, 대치품
DC Electrical Characteristics (Continued)
COP92XC, COP94XC; 0˚C TA +70˚C unless otherwise specified
Parameter
Condition
RAM Retention Voltage, Vr
500 ns Rise and Fall Time (Min)
Input Capacitance
Load Capacitance on D2
Min Typ Max Units
2.0 V
7 pF
1000
pF
Note 2: Rate of voltage change must be less than 0.5V/ms.
Note 3: Supply current is measured after running 2000 cycles with a square wave CKI input, CKO open, inputs at rails and outputs open.
Note 4: The HALT mode will stop CKI from oscillating in the RC and the Crystal configurations. Test conditions: All inputs tied to VCC, L and G0 — G5 configured as
outputs and set high. The D port set to zero.
Note 5: Except pin G7: +100 mA, −25 mA (COP920C only). Sampled and not 100% tested. Pins G6 and RESET are designed with a high voltage input network for
factory testing. These pins allow input voltages greater than VCC and the pins will have sink current to VCC when biased at voltages greater than VCC (the pins do
not have source current when biased at a voltage below VCC). The effective resistance to VCC is 750(typical). These two pins will not latch up. The voltage at the
pins must be limited to less than 14V.
AC Electrical Characteristics
0˚C TA +70˚C unless otherwise specified
Parameter
Condition
Instruction Cycle Time (tc)
Ext., Crystal/Resonator
(Div-by 10)
R/C Oscillator Mode
(Div-by 10)
CKI Clock Duty Cycle (Note 6)
Rise Time (Note 6)
Fall Time (Note 6)
Inputs
tSETUP
tHOLD
Output Propagation Delay
tPD1, tPD0
SO, SK
All Others
MICROWIRESetup Time (tUWS)
MICROWIRE Hold Time (tUWH)
MICROWIRE Output Propagation
Delay (tUPD)
Input Pulse Width
Interrupt Input High Time
Interrupt Input Low Time
Timer Input High Time
Timer Input Low Time
Reset Pulse Width
VCC 4.0V
2.3V VCC 4.0V
VCC 4.0V
2.3V VCC 4.0V
fr = Max
fr = 10 MHz Ext Clock
fr = 10 MHz Ext Clock
VCC 4.0V
2.3V VCC 4.0V
VCC 4.0V
2.3V VCC 4.0V
CL = 100 pF, RL = 2.2 k
VCC 4.0V
2.5V VCC 4.0V
VCC 4.0V
2.5V VCC 4.0V
Note 6: Parameter sampled (not 100% tested).
Min Typ
1
2.5
3
7.5
40
200
500
60
150
20
56
tC
tC
tC
tC
1.0
Max
DC
DC
DC
DC
60
12
8
0.7
1.75
1
2.5
220
Units
µs
µs
µs
µs
%
ns
ns
ns
ns
ns
ns
µs
µs
µs
µs
ns
ns
ns
µs
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COPCH842C 전자부품, 판매, 대치품
Timing Diagram
DS009103-19
FIGURE 2. MICROWIRE/PLUS Timing
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COPCH842C

8-Bit CMOS ROM Based Microcontroller

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