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부품번호 | DM74LS374 기능 |
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기능 | (DM74LS373 / DM74LS374) 3-STATE Octal D-Type Transparent Latches and Edge-Triggered Flip-Flops | ||
제조업체 | Fairchild Semiconductor | ||
로고 | |||
전체 8 페이지수
April 1986
Revised March 2000
DM74LS373 • DM74LS374
3-STATE Octal D-Type Transparent Latches
and Edge-Triggered Flip-Flops
General Description
These 8-bit registers feature totem-pole 3-STATE outputs
designed specifically for driving highly-capacitive or rela-
tively low-impedance loads. The high-impedance state and
increased high-logic level drive provide these registers with
the capability of being connected directly to and driving the
bus lines in a bus-organized system without need for inter-
face or pull-up components. They are particularly attractive
for implementing buffer registers, I/O ports, bidirectional
bus drivers, and working registers.
The eight latches of the DM74LS373 are transparent D-
type latches meaning that while the enable (G) is HIGH the
Q outputs will follow the data (D) inputs. When the enable
is taken LOW the output will be latched at the level of the
data that was set up.
The eight flip-flops of the DM74LS374 are edge-triggered
D-type flip flops. On the positive transition of the clock, the
Q outputs will be set to the logic states that were set up at
the D inputs.
A buffered output control input can be used to place the
eight outputs in either a normal logic state (HIGH or LOW
logic levels) or a high-impedance state. In the high-imped-
ance state the outputs neither load nor drive the bus lines
significantly.
The output control does not affect the internal operation of
the latches or flip-flops. That is, the old data can be
retained or new data can be entered even while the outputs
are OFF.
Features
s Choice of 8 latches or 8 D-type flip-flops in a single
package
s 3-STATE bus-driving outputs
s Full parallel-access for loading
s Buffered control inputs
s P-N-P inputs reduce D-C loading on data lines
Ordering Code:
Order Number Package Number
Package Description
DM74LS373WM
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
DM74LS373SJ
M20D
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
DM74LS373N
N20A
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
DM74LS374WM
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
DM74LS374SJ
M20D
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
IDM29901NC
N20A
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
© 2000 Fairchild Semiconductor Corporation DS006431
www.fairchildsemi.com
DM74LS373 Switching Characteristics
at VCC = 5V and TA = 25°C
Symbol
Parameter
tPLH Propagation Delay Time
LOW-to-HIGH Level Output
tPHL Propagation Delay Time
HIGH-to-LOW Level Output
tPLH Propagation Delay Time
LOW-to-HIGH Level Output
tPHL Propagation Delay Time
HIGH-to-LOW Level Output
tPZH Output Enable Time
to HIGH Level Output
tPZL Output Enable Time
to LOW Level Output
tPHZ
Output Disable Time
from HIGH Level Output (Note 6)
tPLZ Output Disable Time
from LOW Level Output (Note 6)
Note 6: CL = 5 pF.
From (Input)
To (Output)
Data to Q
Data to Q
Enable to Q
Enable to Q
Output Control to Any Q
Output Control to Any Q
Output Control to Any Q
Output Control to Any Q
RL = 667Ω
CL = 45 pF
CL = 150 pF
Min Max Min Max
18 26
18 27
30 38
30 36
28 36
36 50
20
25
Units
ns
ns
ns
ns
ns
ns
ns
ns
DM74LS374 Recommended Operating Conditions
Symbol
Parameter
Min
VCC Supply Voltage
4.75
VIH HIGH Level Input Voltage
2
VIL LOW Level Input Voltage
IOH HIGH Level Output Current
IOL LOW Level Output Current
tW Pulse Width
Clock HIGH
15
(Note 8)
Clock LOW
15
tSU Data Setup Time (Note 7) (Note 8)
20↑
tH Data Hold Time (Note 7) (Note 8)
1↑
TA Free Air Operating Temperature
0
Note 7: The symbol (↑) indicates the rising edge of the clock pulse is used for reference.
Note 8: TA = 25°C and VCC = 5V.
Nom
5
Max
5.25
0.8
−2.6
24
70
Units
V
V
V
mA
mA
ns
ns
ns
°C
www.fairchildsemi.com
4
4페이지 Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M20D
7 www.fairchildsemi.com
7페이지 | |||
구 성 | 총 8 페이지수 | ||
다운로드 | [ DM74LS374.PDF 데이터시트 ] |
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구매 문의 | 일반 IC 문의 : 샘플 및 소량 구매 ----------------------------------------------------------------------- IGBT, TR 모듈, SCR 및 다이오드 모듈을 포함한 광범위한 전력 반도체를 판매합니다. 전력 반도체 전문업체 상호 : 아이지 인터내셔날 사이트 방문 : [ 홈페이지 ] [ 블로그 1 ] [ 블로그 2 ] |
부품번호 | 상세설명 및 기능 | 제조사 |
DM74LS373 | (DM74LS373 / DM74LS374) TRI-STATEE Octal D-Type Transparent Latches and Edge-Triggered Flip-Flops | National Semiconductor |
DM74LS373 | (DM74LS373 / DM74LS374) 3-STATE Octal D-Type Transparent Latches and Edge-Triggered Flip-Flops | Fairchild Semiconductor |
DataSheet.kr | 2020 | 연락처 | 링크모음 | 검색 | 사이트맵 |