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PDF MC74VHC393 Data sheet ( Hoja de datos )

Número de pieza MC74VHC393
Descripción Dual 4-Bit Binary Ripple Counter
Fabricantes Motorola Semiconductors 
Logotipo Motorola Semiconductors Logotipo



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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Dual 4-Bit Binary Ripple
Counter
The MC74VHC393 is an advanced high speed CMOS dual 4–bit binary
ripple counter fabricated with silicon gate CMOS technology. It achieves high
speed operation similar to equivalent Bipolar Schottky TTL while maintaining
CMOS low power dissipation.
This device consists of two independent 4–bit binary ripple counters with
parallel outputs from each counter stage. A ÷256 counter can be obtained by
cascading the two binary counters.
Internal flip–flops are triggered by high–to–low transitions of the clock
input. Reset for the counters is asynchronous and active–high. State
changes of the Q outputs do not occur simultaneously because of internal
ripple delays. Therefore, decoded output signals are subject to decoding
spikes and should not be used as clocks or as strobes except when gated
with the Clock of the VHC393.
The inputs tolerate voltages up to 7V, allowing the interface of 5V systems
to 3V systems.
High Speed: fmax = 170MHz (Typ) at VCC = 5V
Low Power Dissipation: ICC = 4µA (Max) at TA = 25°C
High Noise Immunity: VNIH = VNIL = 28% VCC
Power Down Protection Provided on Inputs
Balanced Propagation Delays
Designed for 2V to 5.5V Operating Range
Low Noise: VOLP = 0.8V (Max)
Pin and Function Compatible with Other Standard Logic Families
Latchup Performance Exceeds 300mA
ESD Performance: HBM > 2000V; Machine Model > 200V
Chip Complexity: 236 FETs or 59 Equivalent Gates
LOGIC DIAGRAM
CPn 1, 13
RDn 2, 12
BINARY
COUNTER
3, 11 nQA
4, 10 nQB
5, 9 nQC
6, 8 nQD
FUNCTION TABLE
Inputs
Clock Reset
Outputs
XH
L
H L No Change
L L No Change
L No Change
L Next State
MC74VHC393
D SUFFIX
14–LEAD SOIC PACKAGE
CASE 751A–03
DT SUFFIX
14–LEAD TSSOP PACKAGE
CASE 948G–01
M SUFFIX
14–LEAD SOIC EIAJ PACKAGE
CASE 965–01
ORDERING INFORMATION
MC74VHCXXXD
MC74VHCXXXDT
MC74VHCXXXM
SOIC
TSSOP
SOIC EIAJ
PIN ASSIGNMENT
CP1 1
RD1 2
1QA 3
1QB 4
1QC 5
1QD 6
GND 7
14 VCC
13 CP2
12 RD2
11 2QA
10 2QB
9 2QC
8 2QD
6/97
© Motorola, Inc. 1997
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MC74VHC393 pdf
CP 1, 13
EXPANDED LOGIC DIAGRAM
CQ
DQ
3, 11 QA
CQ
DQ
4, 10 QB
CQ
DQ
5, 9 QC
CQ
DQ
6, 8 QD
RD 2, 12
MC74VHC393
VHC Data – Advanced CMOS Logic
DL203 — Rev 1
5
MOTOROLA

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