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PDF MC74VHC573 Data sheet ( Hoja de datos )

Número de pieza MC74VHC573
Descripción Octal D-Type Latch with 3-State Output
Fabricantes ON Semiconductor 
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MC74VHC573
Octal D-Type Latch with
3-State Output
The MC74VHC573 is an advanced high speed CMOS octal latch
with 3–state output fabricated with silicon gate CMOS technology. It
achieves high speed operation similar to equivalent Bipolar Schottky
TTL while maintaining CMOS low power dissipation.
This 8–bit D–type latch is controlled by a latch enable input and an
output enable input. When the output enable input is high, the eight
outputs are in a high impedance state.
The internal circuit is composed of three stages, including a buffer
output which provides high noise immunity and stable output. The
inputs tolerate voltages up to 7V, allowing the interface of 5V systems
to 3V systems.
High Speed: tPD = 4.5ns (Typ) at VCC = 5V
Low Power Dissipation: ICC = 4µA (Max) at TA = 25°C
High Noise Immunity: VNIH = VNIL = 28% VCC
Power Down Protection Provided on Inputs
Balanced Propagation Delays
Designed for 2V to 5.5V Operating Range
Low Noise: VOLP = 1.2V (Max)
Pin and Function Compatible with Other Standard Logic Families
Latchup Performance Exceeds 300mA
ESD Performance: HBM > 2000V; Machine Model > 200V
Chip Complexity: 218 FETs or 54.5 Equivalent Gates
DATA
INPUTS
LOGIC DIAGRAM
D0 2
D1 3
D2 4
D3 5
D4 6
D5 7
D6 8
D7 9
19 Q0
18 Q1
17 Q2
16 Q3
15 Q4
14 Q5
13 Q6
12 Q7
LE 11
OE 1
NONINVERTING
OUTPUTS
FUNCTION TABLE
INPUTS
OE LE
D
L HH
LHL
L LX
HXX
OUTPUT
Q
H
L
No Change
Z
http://onsemi.com
20
1
20
1
20
1
SOIC–20 WIDE
DW SUFFIX
CASE 751D
MARKING
DIAGRAMS
20
VHC573
AWLYYWW
1
20
TSSOP–20
DT SUFFIX
CASE 948E
VHC
573
ALYW
1
20
SOIC EIAJ
M SUFFIX
CASE 967
VHC573
AWLYYWW
1
A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
PIN ASSIGNMENT
OE 1
D0 2
D1 3
D2 4
D3 5
D4 6
D5 7
D6 8
D7 9
GND 10
20 VCC
19 Q0
18 Q1
17 Q2
16 Q3
15 Q4
14 Q5
13 Q6
12 Q7
11 LE
ORDERING INFORMATION
Device
MC74VHC573DW
Package Shipping
SOIC–WIDE 38 / Rail
MC74VHC573DWR2 SOIC–WIDE 1000 / Reel
MC74VHC573DT
TSSOP–20 75 / Rail
MC74VHC573DTR2 TSSOP–20 2500 / Reel
MC74VHC573M
MC74VHC573MEL
SOIC EIAJ 40 / Rail
SOIC EIAJ 2000 / Reel
© Semiconductor Components Industries, LLC, 2000
April, 2000 – Rev. 3
1
Publication Order Number:
MC74VHC573/D

1 page




MC74VHC573 pdf
DEVICE
UNDER
TEST
TEST POINT
OUTPUT
CL*
*Includes all probe and jig capacitance
Figure 5.
MC74VHC573
TEST CIRCUITS
DEVICE
UNDER
TEST
TEST POINT
OUTPUT
1 k
CL*
CONNECT TO VCC WHEN
TESTING tPLZ AND tPZL.
CONNECT TO GND WHEN
TESTING tPHZ AND tPZH.
*Includes all probe and jig capacitance
Figure 6.
D0 2
D1 3
D2 4
D3 5
D4 6
D5 7
D6 8
D7 9
EXPANDED LOGIC DIAGRAM
D
Q
LE
D
Q
LE
D
Q
LE
D
Q
LE
D
Q
LE
D
Q
LE
D
Q
LE
D
Q
LE
19 Q0
18 Q1
17 Q2
16 Q3
15 Q4
14 Q5
13 Q6
12 Q7
LE 11
OE 1
INPUT
Figure 7. Input Equivalent Circuit
http://onsemi.com
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