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PDF MC74VHCT574A Data sheet ( Hoja de datos )
| Número de pieza | MC74VHCT574A | |
| Descripción | Octal D-Type Flip-Flop with 3-State Output | |
| Fabricantes | Motorola Semiconductors | |
| Logotipo |  |
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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Octal D-Type Flip-Flop
with 3-State Output
The MC74VHCT574A is an advanced high speed CMOS octal flip–flop
with 3–state output fabricated with silicon gate CMOS technology. It
achieves high speed operation similar to equivalent Bipolar Schottky TTL
while maintaining CMOS low power dissipation.
This 8–bit D–type flip–flop is controlled by a clock input and an output
enable input. When the output enable input is high, the eight outputs are in a
high impedance state.
The VHCT inputs are compatible with TTL levels. This device can be used
as a level converter for interfacing 3.3V to 5.0V, because it has full 5V CMOS
level output swings.
The VHCT574A input and output (when disabled) structures provide
protection when voltages between 0V and 5.5V are applied, regardless of
the supply voltage. These input and output structures help prevent device
destruction caused by supply voltage – input/output voltage mismatch,
battery backup, hot insertion, etc.
• High Speed: fmax = 140MHz (Typ) at VCC = 5V
• Low Power Dissipation: ICC = 4µA (Max) at TA = 25°C
• TTL–Compatible Inputs: VIL = 0.8V; VIH = 2.0V
• Power Down Protection Provided on Inputs and Outputs
• Balanced Propagation Delays
• Designed for 4.5V to 5.5V Operating Range
• Low Noise: VOLP = 1.6V (Max)
• Pin and Function Compatible with Other Standard Logic Families
• Latchup Performance Exceeds 300mA
• ESD Performance: HBM > 2000V; Machine Model > 200V
• Chip Complexity: 286 FETs or 71.5 Equivalent Gates
DATA
INPUTS
LOGIC DIAGRAM
D0 2
D1 3
D2 4
D3 5
D4 6
D5 7
D6 8
D7 9
CP 11
19 Q0
18 Q1
17 Q2
16 Q3
15 Q4
14 Q5
13 Q6
12 Q7
OE 1
NONINVERTING
OUTPUTS
FUNCTION TABLE
INPUTS
OE CP
D
L
L
L L, H,
HX
H
L
X
X
OUTPUT
Q
H
L
No Change
Z
MC74VHCT574A
DW SUFFIX
20–LEAD SOIC PACKAGE
CASE 751D–04
DT SUFFIX
20–LEAD TSSOP PACKAGE
CASE 948E–02
M SUFFIX
20–LEAD SOIC EIAJ PACKAGE
CASE 967–01
ORDERING INFORMATION
MC74VHCTXXXADW SOIC
MC74VHCTXXXADT TSSOP
MC74VHCTXXXAM SOIC EIAJ
PIN ASSIGNMENT
OE 1
D0 2
D1 3
D2 4
D3 5
D4 6
D5 7
D6 8
D7 9
GND 10
20 VCC
19 Q0
18 Q1
17 Q2
16 Q3
15 Q4
14 Q5
13 Q6
12 Q7
11 CP
6/97
© Motorola, Inc. 1997
1
REV 0
1 page  
MC74VHCT574A
OUTLINE DIMENSIONS
DW SUFFIX
PLASTIC SOIC PACKAGE
CASE 751D–04
ISSUE E
–A–
20 11
–B– 10X P
0.010 (0.25) M B M
1 10
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.150
(0.006) PER SIDE.
5. DIMENSION D DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.13
(0.005) TOTAL IN EXCESS OF D DIMENSION
AT MAXIMUM MATERIAL CONDITION.
20X D
0.010 (0.25) M T A S B S
J
F
18X G
C
–T–
SEATING
PLANE
K
M
R X 45_
MILLIMETERS
INCHES
DIM MIN MAX MIN MAX
A 12.65 12.95 0.499 0.510
B 7.40 7.60 0.292 0.299
C 2.35 2.65 0.093 0.104
D 0.35 0.49 0.014 0.019
F 0.50 0.90 0.020 0.035
G 1.27 BSC
0.050 BSC
J 0.25 0.32 0.010 0.012
K 0.10 0.25 0.004 0.009
M 0_ 7_ 0_ 7_
P 10.05 10.55 0.395 0.415
R 0.25 0.75 0.010 0.029
DT SUFFIX
PLASTIC TSSOP PACKAGE
CASE 948E–02
ISSUE A
0.15 (0.006) T U S
2X L/2 20
L
PIN 1
IDENT
1
0.15 (0.006) T U S
C
D
0.100 (0.004)
–T– SEATING
PLANE
20X K REF
0.10 (0.004) M T U S V S
11
B
–U–
10
A
–V–
GH
K
J J1ÍÍÍÍÍÍKÍÍÍ1 ÍÍÍ
SECTION N–N
N 0.25 (0.010)
M
N
F
DETAIL E
DETAIL E
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD FLASH,
PROTRUSIONS OR GATE BURRS. MOLD FLASH
OR GATE BURRS SHALL NOT EXCEED 0.15
(0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE INTERLEAD
FLASH OR PROTRUSION. INTERLEAD FLASH OR
PROTRUSION SHALL NOT EXCEED 0.25 (0.010)
PER SIDE.
5. DIMENSION K DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN
EXCESS OF THE K DIMENSION AT MAXIMUM
MATERIAL CONDITION.
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE DETERMINED
AT DATUM PLANE –W–.
–W–
MILLIMETERS
INCHES
DIM MIN MAX MIN MAX
A 6.40 6.60 0.252 0.260
B 4.30 4.50 0.169 0.177
C ––– 1.20 ––– 0.047
D 0.05 0.15 0.002 0.006
F 0.50 0.75 0.020 0.030
G 0.65 BSC
0.026 BSC
H 0.27 0.37 0.011 0.015
J 0.09 0.20 0.004 0.008
J1 0.09 0.16 0.004 0.006
K 0.19 0.30 0.007 0.012
K1 0.19 0.25 0.007 0.010
L 6.40 BSC
0.252 BSC
M 0_ 8_ 0_ 8_
VHC Data – Advanced CMOS Logic
DL203 — Rev 1
5
MOTOROLA
5 Page | ||
| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet MC74VHCT574A.PDF ] | |
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