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PDF MC74VHCT573A Data sheet ( Hoja de datos )

Número de pieza MC74VHCT573A
Descripción Octal D-Type Latch with 3-State Output
Fabricantes Motorola Semiconductors 
Logotipo Motorola Semiconductors Logotipo



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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Octal D-Type Latch
with 3-State Output
The MC74VHCT573A is an advanced high speed CMOS octal latch with
3–state output fabricated with silicon gate CMOS technology. It achieves
high speed operation similar to equivalent Bipolar Schottky TTL while
maintaining CMOS low power dissipation.
This 8–bit D–type latch is controlled by a latch enable input and an output
enable input. When the output enable input is high, the eight outputs are in a
high impedance state.
The VHCT inputs are compatible with TTL levels. This device can be used
as a level converter for interfacing 3.3V to 5.0V, because it has full 5V CMOS
level output swings.
The VHCT573A input and output (when disabled) structures provide
protection when voltages between 0V and 5.5V are applied, regardless of
the supply voltage. These input and output structures help prevent device
destruction caused by supply voltage – input/output voltage mismatch,
battery backup, hot insertion, etc.
High Speed: tPD = 7.7ns (Typ) at VCC = 5V
Low Power Dissipation: ICC = 4µA (Max) at TA = 25°C
TTL–Compatible Inputs: VIL = 0.8V; VIH = 2.0V
Power Down Protection Provided on Inputs and Outputs
Balanced Propagation Delays
Designed for 4.5V to 5.5V Operating Range
Low Noise: VOLP = 1.6V (Max)
Pin and Function Compatible with Other Standard Logic Families
Latchup Performance Exceeds 300mA
ESD Performance: HBM > 2000V; Machine Model > 200V
Chip Complexity: 234 FETs or 58.5 Equivalent Gates
LOGIC DIAGRAM
DATA
INPUTS
D0 2
D1 3
D2 4
D3 5
D4 6
D5 7
D6 8
D7 9
LE 11
OE 1
19 Q0
18 Q1
17 Q2
16 Q3
15 Q4
14 Q5
13 Q6
12 Q7
NONINVERTING
OUTPUTS
MC74VHCT573A
DW SUFFIX
20–LEAD SOIC PACKAGE
CASE 751D–04
DT SUFFIX
20–LEAD TSSOP PACKAGE
CASE 948E–02
M SUFFIX
20–LEAD SOIC EIAJ PACKAGE
CASE 967–01
ORDERING INFORMATION
MC74VHCTXXXADW SOIC
MC74VHCTXXXADT TSSOP
MC74VHCTXXXAM SOIC EIAJ
PIN ASSIGNMENT
OE 1
D0 2
D1 3
D2 4
D3 5
D4 6
D5 7
D6 8
D7 9
GND 10
20 VCC
19 Q0
18 Q1
17 Q2
16 Q3
15 Q4
14 Q5
13 Q6
12 Q7
11 LE
FUNCTION TABLE
INPUTS
OE LE
D
L HH
LHL
L LX
HXX
OUTPUT
Q
H
L
No Change
Z
6/97
© Motorola, Inc. 1997
1
REV 0

1 page




MC74VHCT573A pdf
2
D0
3
D1
4
D2
5
D3
6
D4
7
D5
8
D6
9
D7
EXPANDED LOGIC DIAGRAM
D
Q
LE
D
Q
LE
D
Q
LE
D
Q
LE
D
Q
LE
D
Q
LE
D
Q
LE
D
Q
LE
11
LE
1
OE
MC74VHCT573A
19
Q0
18
Q1
17
Q2
16
Q3
15
Q4
14
Q5
13
Q6
12
Q7
VHC Data – Advanced CMOS Logic
DL203 — Rev 1
5
MOTOROLA

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