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PDF MC74VHC1G125 Data sheet ( Hoja de datos )

Número de pieza MC74VHC1G125
Descripción Noninverting 3-State Buffer
Fabricantes ON Semiconductor 
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MC74VHC1G125
Noninverting 3−State Buffer
The MC74VHC1G125 is an advanced high speed CMOS
noninverting 3−state buffer fabricated with silicon gate CMOS
technology. It achieves high speed operation similar to equivalent
Bipolar Schottky TTL while maintaining CMOS low power
dissipation.
The internal circuit is composed of three stages, including a buffered
3−state output which provides high noise immunity and stable output.
The MC74VHC1G125 input structure provides protection when
voltages up to 7.0 V are applied, regardless of the supply voltage. This
allows the MC74VHC1G125 to be used to interface 5.0 V circuits to
3.0 V circuits.
Features
These are Pb−Free Devices
High Speed: tPD = 3.5 ns (Typ) at VCC = 5.0 V
Low Power Dissipation: ICC = 1 mA (Max) at TA = 25°C
Power Down Protection Provided on Inputs
Balanced Propagation Delays
Pin and Function Compatible with Other Standard Logic Families
Chip Complexity: FETs = 58; Equivalent Gates = 15
http://onsemi.com
MARKING
DIAGRAMS
SC−88A/SOT−353/SC−70
DF SUFFIX
CASE 419A
W0d
Pin 1
d = Date Code
TSOP−5/SOT−23/SC−59
DT SUFFIX
CASE 483
W0d
Pin 1
d = Date Code
OE 1
IN A 2
GND 3
5 VCC
4 OUT Y
Figure 1. Pinout (Top View)
OE EN
IN A
OUT Y
Figure 2. Logic Symbol
PIN ASSIGNMENT
1 OE
2 IN A
3 GND
4 OUT Y
5 VCC
FUNCTION TABLE
A Input
L
H
X
OE Input
L
L
H
Y Output
L
H
Z
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
© Semiconductor Components Industries, LLC, 2004
September, 2004 − Rev. 12
1
Publication Order Number:
MC74VHC1G125/D

1 page




MC74VHC1G125 pdf
MC74VHC1G125
PACKAGE DIMENSIONS
SC70−5/SC−88A/SOT−353
DF SUFFIX
5−LEAD PACKAGE
CASE 419A−02
ISSUE G
A
G
54
NOTES:
1. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. 419A−01 OBSOLETE. NEW STANDARD
419A−02.
4. DIMENSIONS A AND B DO NOT INCLUDE
MOLD FLASH, PROTRUSIONS, OR GATE
BURRS.
S −B−
12
3
D 5 PL
0.2 (0.008) M B M
N
J
INCHES
DIM MIN MAX
A 0.071 0.087
B 0.045 0.053
C 0.031 0.043
D 0.004 0.012
G 0.026 BSC
H −−− 0.004
J 0.004 0.010
K 0.004 0.012
N 0.008 REF
S 0.079 0.087
MILLIMETERS
MIN MAX
1.80 2.20
1.15 1.35
0.80 1.10
0.10 0.30
0.65 BSC
−−− 0.10
0.10 0.25
0.10 0.30
0.20 REF
2.00 2.20
K
SOLDERING FOOTPRINT*
0.50
0.0197
0.40
0.0157
0.65
0.025
0.65
0.025
1.9
0.0748
ǒ ǓSCALE 20:1
mm
inches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
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