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LXT9863 데이터시트 PDF




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부품번호 LXT9863 기능
기능 (LXT9883 / LXT9863) Advanced 10/100 Unmanaged Repeater
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LXT9863 데이터시트, 핀배열, 회로
LXT9883/9863
Advanced 10/100 Unmanaged Repeater
Datasheet
The LXT9883 is an advanced, 3.3V, 8-port 10/100 repeater. The LXT9883 is compatible with
previous generations of Intel repeaters from the LXT980 and LXT918 families. Eight ports
directly support 100BASE-TX/10BASE-T copper media. Two additional Media Independent
Interface (MII) ports (10/100Mbps selectable) connect to Media Access Controllers (MACs) for
bridge/switch applications. The LXT9863 offers the same features and functionality in a six-port
device. This data sheet uses the singular designation “LXT98x3” to refer to both devices.
The LXT98x3 provides auto-negotiation with parallel detection for the PHY ports. The
LXT98x3 provides two internal repeater state machines—one operating at 10 Mbps and one at
100 Mbps. Once configured, the LXT98x3 automatically connects each port to the appropriate
repeater. The LXT98x3 also provides two Inter-Repeater Backplanes (IRBs) for expansion —
one operating at 10 Mbps and one at 100 Mbps. Up to 240 twisted-pair and MII ports can
logically be combined into one repeater.
Product Features
s Six or eight 10/100 ports with integrated
twisted-pair PHYs including integrated
filters.
s Two 10/100 MIIs for bridging.
s Independent segments for 10Mbps and
100 Mbps operation.
s Cascadable Inter-Repeater Backplanes
(IRBs), with option for 5V stacking
compatibility.
s Integrated LED drivers with user-selectable
modes.
s Available in 208-pin QFP package.
s Operating temperature range: 0-70°C,
ambient.
As of January 15, 2001, this document replaces the Level One document
LXT9883/LXT9863 — Advanced 10/100 Unmanaged Repeater.
Order Number: 249115-003
August 2001




LXT9863 pdf, 반도체, 판매, 대치품
Contents
4.2.3 Power and Ground Plane Layout Considerations.................................................. 33
4.2.4 Chassis Ground ..................................................................................................... 34
4.2.5 The RBIAS Pin....................................................................................................... 34
4.2.6 MII Terminations .................................................................................................... 35
4.2.7 Twisted-Pair Interface............................................................................................ 36
4.2.7.1 Magnetics Information............................................................................ 36
4.2.8 Clock...................................................................................................................... 37
4.2.9 LED Circuits........................................................................................................... 39
4.2.9.1 Direct Drive LEDs .................................................................................. 39
4.2.9.2 LED Pins Multiplexed with Configuration Inputs .................................... 39
4.2.9.3 Serial LEDs ............................................................................................ 40
4.3 Inter-Repeater Backplane Compatibility ............................................................................. 41
4.3.1 Local Backplane3.3V Only ................................................................................. 41
4.3.2 Stack Backplane3.3V or 5V ............................................................................... 41
4.3.2.1 3.3V-Only Stacks ................................................................................... 41
4.3.2.2 For 5V Backwards Stackability .............................................................. 41
4.3.2.3 3.3V and 5.0V Stacking Boards Cannot Be Mixed ................................ 41
5.0 Test Specifications...................................................................................................................... 44
6.0 Mechanical Specifications.......................................................................................................... 56
Figures
1 LXT98x3 Block Diagram............................................................................................................... 7
2 LXT9883 Pin Assignments ........................................................................................................... 8
3 Typical LXT9883 Repeater Architecture .................................................................................... 17
4 MII Interface................................................................................................................................ 19
5 Serial LED Shift Loading ........................................................................................................... 22
6 Serial LED Port Signaling ........................................................................................................... 23
7 100M IRB Connection ................................................................................................................ 29
8 IRB Block Diagram .................................................................................................................... 30
9 LXT9883 MII Operation .............................................................................................................. 32
10 Power and Ground Connections ................................................................................................ 35
11 Typical Twisted-Pair Port Interface and Power Supply Filtering ................................................ 38
12 Typical Reset Circuit .................................................................................................................. 38
13 LED Circuits - Direct Drive & Multiplexed Configuration Inputs .................................................. 39
14 Serial LED Circuit ....................................................................................................................... 40
15 100M Backplane Connection between LXT98x and LXT98x3 ................................................... 42
16 Typical 100 Mbps IRB Implementation ...................................................................................... 43
17 Typical 10 Mbps IRB Implementation ........................................................................................ 43
18 100 Mbps TP Port-to-Port Delay Timing..................................................................................... 48
19 100BASE-TX MII-to-TP Port Timing .......................................................................................... 49
20 100BASE-TX TP-to-MII Timing ................................................................................................. 50
21 10BASE-T MII-to-TP Timing ...................................................................................................... 51
22 10BASE-T TP-to-MII Port Timing .............................................................................................. 52
23 100 Mbps TP-to-IRB Timing ...................................................................................................... 53
24 10 Mbps TP-to-IRB Timing ........................................................................................................ 54
25 10 Mbps IRB-to-TP Port Timing ................................................................................................ 55
26 LXT98x3 Package Specifications .............................................................................................. 56
4 Datasheet
Document #: 249115
Revision #: 003
Rev. Date: 08/07/01

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LXT9863 전자부품, 판매, 대치품
Advanced 10/100 Unmanaged Repeater — LXT9883/9863
1.0 Block Diagram
Figure 1. LXT98x3 Block Diagram
10M IRB
10 Mbps
Backplane
10BASE-T
Repeater
100M IRB
100 Mbps
Backplane
100BASE-X
Repeater
Port & Mgmt
Status Indicators
Serial LED
Drivers
10/100 PHY 1
10/100 PHY 2
10/100 PHY 3
10/100 PHY 4
10/100 PHY 5
10/100 PHY 6
10/100 PHY 7
10/100 PHY 8
MII 1
MII 2
TX_I/O
TX_I/O
TX_I/O
TX_I/O
TX_I/O
TX_I/O
TX_I/O
TX_I/O
MII_I/O
MII_I/O
Datasheet
Document #: 249115
Revision #: 003
Rev. Date: 08/07/01
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