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PDF DS1020 Data sheet ( Hoja de datos )
| Número de pieza | DS1020 | |
| Descripción | Programmable 8-Bit Silicon Delay Line | |
| Fabricantes | Dallas Semiconducotr | |
| Logotipo |  |
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DS1020
Programmable 8-Bit
Silicon Delay Line
FEATURES
All-silicon time delay
Models with 0.15 ns, 0.25 ns, 0.5 ns, 1 ns,
and 2 ns steps
Programmable using 3-wire serial port or
8-bit parallel port
Leading and trailing edge accuracy
Standard 16-pin DIP or 16-pin SOIC
Economical
Auto-insertable, low profile
Low-power CMOS
TTL/CMOS-compatible
Vapor phase, IR and wave solderable
PIN ASSIGNMENT
IN
E
Q/PO
P1
P2
P3
P4
GND
1
2
3
4
5
6
7
8
16 VCC
15 OUT
14 S
IN 1
E2
13 P7 Q/PO 3
12 P6 P1 4
11 C
P2 5
P3 6
10 P5 P4 7
9 D GND
8
16 VCC
15 OUT
14 S
13 P7
12 P6
11 C
10 P5
9D
DS1020 16-pin DIP (300-mil) DS1020S 16-pin SOIC (300-mil)
See Mech. Drawings Section See Mech. Drawings Section
PIN DESCRIPTION
IN - Delay Input
P0-P7
- Parallel Program Pins
GND
- Ground
OUT
- Delay Output
VCC - +5 Volts
S - Mode Select
E - Enable
C - Serial Port Clock
Q - Serial Data Output
D - Serial Data Input
DESCRIPTION
The DS1020 Programmable 8-Bit Silicon Delay Line consists of an 8-bit, user-programmable CMOS
silicon integrated circuit. Delay values, programmed using either the 3-wire serial port or the 8-bit
parallel port, can be varied over 256 equal steps. The fastest model (-15) offers a maximum delay of
48.25 ns with an incremental delay of 0.15 ns, while the slowest model (-200) has a maximum delay of
520 ns with an incremental delay of 2 ns. All models have an inherent (step-zero) delay of 10 ns. After
the user-determined delay, the input logic state is reproduced at the output without inversion. The
DS1020 is TTL- and CMOS-compatible, capable of driving 10 74LS-type loads, and features both rising
and falling edge accuracy.
The all-CMOS DS1020 integrated circuit has been designed as a reliable, economic alternative to hybrid
programmable delay lines. It is offered in a standard 16-pin auto-insertable DIP and a space-saving
surface mount 16-pin SOIC.
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DALLAS SEMICONDUCTOR TEST CIRCUIT Figure 4
DS1020
TEST SETUP DESCRIPTION
Figure 4 illustrates the hardware configuration used for measuring the timing parameters of the DS1020.
The input waveform is produced by a precision pulse generator under software control. Time delays are
measured by a time interval counter (20 ps resolution) connected to the output. The DS1020 serial and
parallel ports are controlled by interfaces to a central computer. All measurements are fully automated
with each instrument controlled by the computer over an IEEE 488 bus.
TEST CONDITIONS
INPUT:
Ambient Temperature:
Supply Voltage (VCC):
Input Pulse:
Source Impedance:
Rise and Fall Time:
25°C ±=3°C
5.0V ±=0.1V
High = 3.0V ±=0.1V
Low = 0.0V ±=0.1V
50 ohms max.
3.0 ns max.
(measured between
0.6V and 2.4V)
Pulse Width:
Period:
500 ns (DS1020–15)
500 ns (DS1020–25)
2 µs (DS1020–50)
4 µs (DS1020–100)
4 µs (DS1020–200)
1 µs (DS1020–15)
1 µs (DS1020–25)
4 µs (DS1020–50)
8 µs (DS1020–100)
8 µs (DS1020–200)
NOTE: Above conditions are for test only and do not restrict the operation of the device under other data
sheet conditions.
OUTPUT:
Output is loaded with a 74F04. Delay is measured between the 1.5V level of the rising edge of the input
signal and the 1.5V level of the corresponding edge of the output.
5 of 9
5 Page | ||
| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet DS1020.PDF ] | |
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