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PDF BR24L64 Data sheet ( Hoja de datos )

Número de pieza BR24L64
Descripción (BR24L32 / BR24L64) EEPROM
Fabricantes ROHM Semiconductor 
Logotipo ROHM Semiconductor Logotipo



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No Preview Available ! BR24L64 Hoja de datos, Descripción, Manual

BR24L32-W/F-W/FJ-W*/FV-W
BR24L64-W/F-W
Features
• 32k bit serial EEPROM organized as 4k × 8bit (BR24L32)
64k bit serial EEPROM organized as 8k × 8bit (BR24L64)
• 2 wire bus serial interface (2 byte Address)
• Low operating voltage range (2V operating)
Read : 1.8~5.5V
Write : 1.8~5.5V
• Low current consumption
Active : 3mA MAX
Standby : 2µA MAX
• Clock frequency : 100kHz MAX (1.8~5.5V)
400kHz MAX (2.5~5.5V)
• Write cycle time : 5ms MAX
• Address auto-increment function during read operation
• Automatic erase-before-write function during write operation
• Page write function : 32byte
• Inadvertent write protection function
Inadvertent write protection at low voltage (Vcc Lock-out function)
WP (Write Protect) function
• Schmitt trigger circuit and noise filter are built into SCL and
SDA pins
• 1,000,000 write cycle typical
• 40 years data retention
• Operating temperature range : -40~85˚C
Block Diagram
Pin Configurations
A0 1
A1 2
A2 3
GND 4
8 Vcc
7 WP
6 SCL
5 SDA
DIP8/SOP8/SOP-J8*/SSOP-B8
DIP8/SOP8 (Only BR24L64)
Pin Functions
Pin Names
Functions
A0, A1, A2 Slave Address Inputs
GND Ground
SDA Serial Data Input/Output
SCL Serial Data Clock
WP Write Protect
Vcc Power Supply
* Under development
32~64k bit EEPROM Array
A0 12bit:BR24L32
13bit: BR24L64
8bit WP
A1
Address 12bit:BR24L32 Slave Words
Data
SCL
Decoder 13bit:BR24L64 Address Register
Register
A2 SDA
START STOP
Control Logic
High Voltage
Generation
Voltage Detection
ACK
9

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