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PDF LT1431M Data sheet ( Hoja de datos )
| Número de pieza | LT1431M | |
| Descripción | Programmable Reference | |
| Fabricantes | Linear Technology | |
| Logotipo |  |
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FEATURES
s Guaranteed 0.4% Initial Voltage Tolerance
s 0.1Ω Typical Dynamic Output Impedance
s Fast Turn-On
s Sink Current Capability, 1mA to 100mA
s Low Reference Pin Current
APPLICATI S
s Linear Regulators
s Adjustable Power Supplies
s Switching Power Supplies
LT1431
Programmable Reference
DESCRIPTIO
The LT1431 is an adjustable shunt voltage regulator with
100mA sink capability, 0.4% initial reference voltage tol-
erance, and 0.3% typical temperature stability. On-chip
divider resistors allow the LT1431 to be configured as a 5V
shunt regulator, with 1% initial voltage tolerance and
requiring no additional external components. By adding
two external resistors, the output voltage may be set to any
value between 2.5V and 36V. The nominal internal current
limit of 100mA may be decreased by including one exter-
nal resistor.
A simplified three pin version, the LT1431Z/IZ, is available
for applications as an adjustable reference and is pin
compatible with the TL431.
TYPICAL APPLICATI
+
+
VIN
SWITCHING
REGULATOR
–
Isolated 5V Regulator
5V
COLL
GND-F
COMP
V+
+
gm =
4mA/V
–
LT1431
RTOP
REF
RMID
2.5V
GND-S
LT1431 • TA01
1
1 page  
LT1431
PI FU CTIO S
COLL (Pin 1): Open collector of the output transistor. The
maximum pin voltage is 26V. The saturation voltage at
100mA is approximately 1V.
COMP (Pin 2): Base of the driver for the output transistor.
This pin allows additional compensation for complex
feedback systems and shutdown of the regulator. It must
be left open if unused.
V + (Pin 3): Bias voltage for the entire shunt regulator. The
maximum input voltage is 36V and the minimum to
operate is equal to VREF (2.5V). The quiescent current is
typically 0.6mA.
RTOP (Pin 4): Top of the on-chip 5k-5k resistive divider
that guarantees 1% accuracy of operation as a 5V shunt
regulator with no external trim. The pin is tied to COLL for
self-contained 5V operation. It may be left open if unused.
See note on parasitic diodes below.
GND-S (Pin 5): Ground reference for the on-chip resistive
divider and shunt regulator circuitry except for the output
transistor. This pin allows external current limit of the
output transistor with one resistor between GND-F (force)
and GND-S (sense).
GND-F (Pin 6): Emitter of the output transistor and sub-
strate connection for the die.
RMID (Pin 7): Middle of the on-chip resistive divider string
between RTOP and GND-S. The pin is tied to REF for self-
contained 5V operation. It may be left open if unused.
REF (Pin 8): Control pin of the shunt regulator with a 2.5V
threshold. If V + > 3V, input bias current cancellation
reduces IB to 0.2µA typical.
COMP, RTOP, RMID, and REF have static discharge protec-
tion circuits that must not be activated on a continuous
basis. Therefore, the absolute maximum DC voltage on
these pins is 6V, well beyond the normal operating condi-
tions.
As with all bipolar ICs, the LT1431 contains parasitic
diodes which must not be forward biased or else anoma-
lous behavior will result. Pin conditions to be avoided are
RTOP below RMID in voltage and any pin below GND-F in
voltage (except for GND-S).
The following pin definitions apply to the Z package.
CATHODE (Pin 1): Corresponds to COLL and V + tied
together.
ANODE (Pin 2): Corresponds to GND-S and GND-F tied
together.
REF (Pin 3): Corresponds to REF.
BLOCK DIAGRA
RTOP
4
8
REF
7
RMID
5k
5k
V+
3
+
gm =
4mA/V
–
2.5V
COMP
2
COLLECTOR
1
5
GND-SENSE
6
GND-FORCE
LT1431 • BD01
5
5 Page 
LT1431
PACKAGE DESCRIPTIO Dimensions in inches (millimeters) unless otherwise noted.
J8 Package
8-Lead Ceramic DIP
0.005
(0.127)
MIN
0.405
(10.287)
MAX
8 765
0.290 – 0.320
(7.366 – 8.128)
0.008 – 0.018
(0.203 – 0.460)
0.385 ± 0.025
(9.779 ± 0.635)
0° – 15°
0.025
(0.635)
RAD TYP
0.055
(1.397)
MAX
0.220 – 0.310
(5.588 – 7.874)
1 234
0.200
(5.080)
MAX
0.015 – 0.060
(0.381 – 1.524)
0.038 – 0.068
(0.965 – 1.727)
0.014 – 0.026
(0.360 – 0.660)
0.125
3.175
0.100 ± 0.010 MIN
(2.540 ± 0.254)
J8 0392
0.300 – 0.320
(7.620 – 8.128)
0.009 – 0.015
(0.229 – 0.381)
+0.025
0.325 –0.015
( )8.255
+0.635
–0.381
N8 Package
8-Lead Plastic DIP
8
0.400
(10.160)
MAX
76
5
0.250 ± 0.010
(6.350 ± 0.254)
12
0.045 – 0.065
(1.143 – 1.651)
34
0.130 ± 0.005
(3.302 ± 0.127)
0.065
(1.651)
TYP
0.045 ± 0.015
(1.143 ± 0.381)
0.100 ± 0.010
(2.540 ± 0.254)
0.125
(3.175)
MIN
0.020
(0.508)
MIN
0.018 ± 0.003
(0.457 ± 0.076)
N8 0392
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of circuits as described herein will not infringe on existing patent rights.
11
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet LT1431M.PDF ] | |
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