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부품번호 | OV9625 기능 |
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기능 | (OV9121 / OV9625) CMOS SXGA Carerachip | ||
제조업체 | Omni Vision | ||
로고 | |||
Omni
ision
TM
Advanced Information
Preliminary Datasheet
OV9625 Color CMOS SXGA (1.3 MPixel) CAMERACHIPTM
OV9121 B&W CMOS SXGA (1.3 MPixel) CAMERACHIPTM
General Description
The OV9625 (color) and OV9121 (black and white) are
high-performance 1.3 mega-pixel CAMERACHIPSTM for
digital still image and video camera products.
Both devices incorporate a 1280 x 1024 (SXGA) image
array and an on-chip 10-bit A/D converter capable of
operating at up to 15 frames per second (fps) at full
resolution and an improved micro lens design to decrease
shading. Proprietary sensor technology utilizes advanced
algorithms to cancel Fixed Pattern Noise (FPN), eliminate
smearing, and drastically reduce blooming. The control
registers allow for flexible control of timing, polarity, and
CameraChip operation, which, in turn, allows the engineer
a great deal of freedom in product design.
Features
• Optical Black Level Calibration (BLC)
• Improved micro lens design to decrease shading
• Video or snapshot operations
• Programmable/Auto Exposure and Gain Control
• Programmable/Auto White Balance Control
• Horizontal and vertical sub-sampling (4:2 and 4:2)
• Programmable image windowing
• Variable frame rate control
• On-chip R/G/B channel and luminance average
counter
• Internal/External frame synchronization
• SCCB slave interface
• Power-on reset and power-down mode
Applications
• Digital still cameras
• PC camera/dual mode
• Video conference applications
• Machine vision
• Security cameras
• Biometrics
Key Specifications
Array Size
SXGA
VGA
Core
Power Supply
Analog
I/O
Power
Active
Requirements
Standby
Output Formats (10-bit)
Lens Size
Max. Image
SXGA
Transfer Rate
VGA
Sensitivity
S/N Ratio
Dynamic Range
Scan Mode
Gamma Correction
Electronics
SXGA
Exposure
VGA
Pixel Size
Dark Current
Fixed Pattern Noise
Image Area
Package Dimensions
1280 x 1024
640 x 480
2.5VDC + 10%
3.3VDC + 10%
3.3VDC + 10%
< 50 mA
< 10 µA
Raw RGB Data
1/2"
15 fps
30 fps
1.0 V/Lux-sec
54 dB
60 dB (due to ADC limitations)
Progressive
N/A
Up to 1050:1
Up to 500:1
5.2 µm x 5.2 µm
28 mV/s
< 0.03% of VPEAK-TO-PEAK
6.66 mm x 5.32 mm
.560 in. x .560 in.
Figure 1 OV9625/OV9121 Pin Diagram
Ordering Information
Product
OV09625-C00A (Color, SXGA,
VGA)
OV09121-C00A (B&W with
microlens, SXGA, VGA)
Package
CLCC-48
CLCC-48
30 29 28 27 26 25 24 23 22 21 20 19
PCLK 31
18 ASUB
D5 32
D6 33
17 AGND
16 AVDD
D7 34
15 VcCHG
D8 35
D9 36
DOVDD 37
OV9625/OV9121
14 FSIN
13 VGA
12 EXPSTB
DOGND 38
11 SCCB_E
HREF 39
10 RESET
CHSYNC 40
VSYNC 41
9 NC
8 FREX
NC 42
7 PWDN
43 44 45 46 47 48 1 2 3 4 5 6
Version 1.3, September 15, 2003
Proprietary to OmniVision Technologies
1
OV9625/OV9121 CMOS SXGA (1.3 MPixel) CAMERACHIP™
Omni ision
Sub-sampling Mode
Default resolution for the OV9625/OV9121 is 1280 x 1024
pixels, with all active pixels being output (see Figure 5).
The OV9625/OV9121 can be programmed to output in
640 x 480 (VGA) sized images for applications where
higher resolution image capture is not required.
Figure 5 Pixel Array
Column #
i i+1 i+2 i+3 i+4 i+5 i+6 i+7 i+8 i+9
n B G B GB G B G B G
n+1 G R G R G R G R G R
n+2 B G B G B G B G B G
n+3 G R G R G R G R G R
Row #
n+4 B G B G B G B G B G
n+5 G R G R G R G R G R
n+6 B G B G B G B G B G
n+7 G R G R G R G R G R
For VGA resolution, the following sub-sampling method is
available:
Progressive Sub-sampling
The entire array is sub-sampled for maximal image
quality. Both horizontal and vertical pixels are
sub-sampled to an aspect ration of 4:2 as illustrated in
Figure 6.
Figure 6 Sub-Sampling Mode
Column
Row n B G
n+1 G R
n+2
n+3
n+4 B G
n+5 G R
n+6
n+7
BG
GR
BG
GR
Skipped Pixels
BG
GR
BG
GR
4 Proprietary to OmniVision Technologies
Slave Operation Mode
The OV9625/OV9121 can be programmed to operate in
slave mode (default is master mode).
When used as a slave device, the OV9625/OV9121
changes the HSYNC and VSYNC outputs to input pins for
use as horizontal and vertical synchronization input
triggers supplied by the master device. The master device
must provide the following signals:
1. System clock MCLK to XCLK1 pin
2. Horizontal sync MHSYNC to CHSYNC pin
3. Vertical frame sync MVSYNC to VSYNC pin
See Figure 7 for slave mode connections and Figure 8 for
detailed timing considerations. In this mode, the clock for
all devices should be the same. Otherwise, the devices
will suffer from flickering at line frequency.
Figure 7 Slave Mode Connection
D[9:0]
CHSYNC
VSYNC
XCLK1
MHSYNC
MVSYNC
MCLK
OV9625
(OV9121)
Master
Device
Figure 8 Slave Mode Timing
VSYNC
HSYNC
MCLK
TVS
T
frame
Tline
Tclk
THS
NOTE:
1) THS > 6 Tclk, Tvs > Tline
2) Tline = 1520 x Tclk (SXGA); Tline = 800 x Tclk (VGA)
3) Tframe = 1050 x Tline (SXGA); Tframe = 500 x Tline (VGA)
Channel Average Calculator
OV9625/OV9121 provides average output level data for
the R/G/B channels along with frame-averaged luminance
level. Access to the data is via the serial control port.
Average values are calculated from 128 pixels per line (64
in VGA).
Version 1.3, September 15, 2003
4페이지 Omni ision
Functional Description
Timing Generator
In general, the timing generator controls the following
functions:
• Frame Exposure Mode Timing
• Frame Rate Timing
• Frame Rate Adjust
Frame Exposure Mode Timing
OV9625/OV9121 supports frame exposure mode.
Typically the frame exposure mode must work with the aid
of an external shutter.
The frame exposure pin, FREX (pin 8) is the frame
exposure mode enable pin and EXPSTB (pin 12) serves
as the exposure start trigger for the sensor. There are two
ways to set Frame Exposure mode:
• Control both FREX and EXPSTB pins - Frame
Exposure mode can be set by pulling both FREX and
EXPSTB pins high at the same time (see Figure 19).
• Control FREX only and keep EXPSTB low - In this
case, the pre-charge time is tline and sensor
exposure time is the period after pre-charge until the
shutter closes (see Figure 18).
When the external master device asserts the FREX pin
high, the sensor array is quickly pre-charged and stays in
reset mode until the EXPSTB pin is pulled low by the
external master (sensor exposure time can be defined as
the period between EXPSTB low to shutter close). After
the FREX pin is pulled low, the video data stream is then
clocked to the output port in a line-by-line manner. After
completing one frame of data output, OV9625/OV9121
will output continuous live video data unless in single
frame transfer mode. Figure 18 and Figure 19 show the
detailed timing for this mode.
For frame exposure, register AEC (0x10) must be set to
0xFF and register GAIN (0x00) should be no larger than
0x10 (maximum 2x gain).
Frame Rate Timing
Default frame timing is illustrated in Figure 16 and
Figure 17. Refer to Table 2 for the actual pixel rate at
different frame rates.
Table 2
Frame and Pixel Rates
Frame Rage (fps) 15 10 7.5 6
5
PCLK (MHz)
24 16 12 9.6 8
NOTE: Based on 24 MHz external clock and internal PLL
on, frame rate is adjusted by the main clock divide method.
Frame Rate Adjust
OV9625/OV9121 offers three methods of frame rate
adjustment.
1. Clock prescaler (see “CLKRC” on page 20)
By changing the system clock divide ratio, the frame
rate and pixel rate will change together. This
method can be used for dividing the frame/pixel rate
by: 1/2, 1/3, 1/4 … 1/64 of the input clock rate.
2. Line adjustment (see “COML” on page 24 and see
“FRARL” on page 25)
By adding dummy pixel timing in each line, the
frame rate can be changed while leaving the pixel
rate as is.
3. Vertical sync adjustment
By adding dummy line periods to the vertical sync
period (see “ADDVSL” on page 25 and see
“ADDVSH” on page 25), the frame rate can be
altered while the pixel rate remains the same.
After changing registers COML (0x2A) and FRARL (0x2B)
to adjust the dummy pixels, it is necessary to write to
register COMH (0x12) or CLKRC (0x11) to reset the
counter. Generally, OmniVision suggests users write to
register COMH (0x12) (to change the sensor mode) as the
last one. However, if you want to adjust the cropping
window, it is necessary to write to those registers after
changing register COMH (0x12). To use COMH to reset
the counter, it is necessary to generate a pulse on
resolution control register bit COMH[6].
Version 1.3, September 15, 2003
Proprietary to OmniVision Technologies
7
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부품번호 | 상세설명 및 기능 | 제조사 |
OV9625 | (OV9121 / OV9625) CMOS SXGA Carerachip | Omni Vision |
DataSheet.kr | 2020 | 연락처 | 링크모음 | 검색 | 사이트맵 |