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PDF ST62T15C Data sheet ( Hoja de datos )

Número de pieza ST62T15C
Descripción (ST62T15C / ST62T25C) 8-BIT OTP/EPROM MCUs WITH A/D CONVERTER
Fabricantes ST Microelectronics 
Logotipo ST Microelectronics Logotipo



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No Preview Available ! ST62T15C Hoja de datos, Descripción, Manual

ST62T15C/T25C/E25C
8-BIT OTP/EPROM MCUs WITH A/D CONVERTER,
OSCILLATOR SAFEGUARD, SAFE RESET AND 28 PINS
s 3.0 to 6.0V Supply Operating Range
s 8 MHz Maximum Clock Frequency
s -40 to +125°C Operating Temperature Range
s Run, Wait and Stop Modes
s 5 Interrupt Vectors
s Look-up Table capability in Program Memory
s Data Storage in Program Memory:
User selectable size
s Data RAM: 64bytes
s User Programmable Options
s 20 I/O pins, fully programmable as:
– Input with pull-up resistor
– Input without pull-up resistor
– Input with interrupt generation
– Open-drain or push-pull output
– Analog Input
s 4 I/O lines can sink up to 20mA to drive LEDs or
TRIACs directly
s 8-bit Timer/Counter with 7-bit programmable
prescaler
s Digital Watchdog
s Oscillator Safe Guard
s Low Voltage Detector for Safe Reset
s 8-bit A/D Converter with 16 analog inputs
s On-chip Clock oscillator can be driven by Quartz
Crystal Ceramic resonator or RC network
s Power-on Reset
s One external Non-Maskable Interrupt
s ST626x-EMU2 Emulation and Development
System (connects to an MS-DOS PC via a
parallel port).
DEVICE SUMMARY
DEVICE
ST62T15C
ST62T25C
ST62E25C
OTP
(Bytes)
1836
3884
EPROM
(Bytes)
-
-
3884
I/O Pins
20
20
20
PDIP28
PS028
SS0P28
CDIP28W
(See end of Datasheet for Ordering Information)
August 1999
Rev. 2.8
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ST62T15C pdf
ST62T15C/T25C/E25C
1.2 PIN DESCRIPTIONS
VDD and VSS. Power is supplied to the MCU via
these two pins. VDD is the power connection and
VSS is the ground connection.
OSCin and OSCout. These pins are internally
connected to the on-chip oscillator circuit. A quartz
crystal, a ceramic resonator or an external clock
signal can be connected between these two pins.
The OSCin pin is the input pin, the OSCout pin is
the output pin.
RESET. The active-low RESET pin is used to re-
start the microcontroller. Internal pull-up is provid-
ed at this pin.
TEST/VPP. The TEST must be held at VSS for nor-
mal operation. If TEST pin is connected to a
+12.5V level during the reset phase, the EPROM
programming Mode is entered.
NMI. The NMI pin provides the capability for asyn-
chronous interruption, by applying an external non
maskable interrupt to the MCU. The NMI input is
falling edge sensitive. The user can select as op-
tion the availability of an on-chip pull-up at this pin.
TIMER. This is the timer I/O pin. In input mode it is
connected to the prescaler and acts as external
timer clock input or as control gate input for the in-
ternal timer clock. In output mode the timer pin out-
puts the data bit when a time-out occurs. The user
can select as option the availability of an on-chip
pull-up at this pin.
PA0-PA7. These 8 lines are organized as one I/O
port (A). Each line may be configured under soft-
ware control as inputs with or without internal pull-
up resistors, interrupt generating inputs with pull-
up resistors, open-drain or push-pull outputs. PA0-
PA3 can also sink 20mA for direct LED driving
while PA4-PA7 can be programmed as analog in-
puts for the A/D converter.
PB0-PB7. These 8 lines are organized as one I/O
port (B). Each line may be configured under soft-
ware control as inputs with or without internal pull-
up resistors, interrupt generating inputs with pull-
up resistors, open-drain or push-pull outputs, or as
analog inputs for the A/D converter.
PC4-PC7. These 4 lines are organized as one I/O
port (C). Each line may be configured under soft-
ware control as inputs with or without internal pull-
up resistors, interrupt generating inputs with pull-
up resistors, open-drain or push-pull outputs, or as
analog inputs for the A/D converter.
Figure 2. ST62T15C,T25C and E25C Pin
Configuration
VDD
TIMER
OSCin
OSCout
NMI
Ain/PC7
Ain/PC6
Ain/PC5
Ain/PC4
VPP/T EST
RESET
Ain/PB7
Ain/PB6
Ain/PB5
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28 VSS
27 PA0/20mA Sink
26 PA1/20mA Sink
25 PA2/20mA Sink
24 PA3/20mA Sink
23 PA4/Ain
22 PA5/Ain
21 PA6/Ain
20 PA7/Ain
19 PB0/Ain
18 PB1/Ain
17 PB2/Ain
16 PB3/Ain
15 PB4/Ain
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ST62T15C arduino
ST62T15C/T25C/E25C
PROGRAMMING MODES (Cont’d)
1.4.2 Program Memory
EPROM/OTP programming mode is set by a
+12.5V voltage applied to the TEST/VPP pin. The
programming flow of the ST62T15C,T25C/E25C is
described in the User Manual of the EPROM Pro-
gramming Board.
Table 2. ST62T15C Program Memory Map
Device Address
0000h-087Fh
0880h-0F9Fh
0FA0h-0FEFh
0FF0h-0FF7h
0FF8h-0FFBh
0FFCh-0FFDh
0FFEh-0FFF h
Description
Reserved
User ROM
Reserved
Interrupt Vectors
Reserved
NMI Interrupt Vector
Reset Vector
Table 3. ST62T25C,E25C Program Memory Map
Device Address
0000h-007Fh
0080h-0F9Fh
0FA0h-0FEFh
0FF0h-0FF7h
0FF8h-0FFBh
0FFCh-0FFDh
0FFEh-0FFF h
Description
Reserved
User ROM
Reserved
Interrupt Vectors
Reserved
NMI Interrupt Vector
Reset Vector
Note: OTP/EPROM devices can be programmed
with the development tools available from STMi-
croelectronics (ST62E2X-EPB or ST622X-KIT).
1.4.3 EPROM Erasing
The EPROM of the windowed package of the
MCUs may be erased by exposure to Ultra Violet
light. The erasure characteristic of the MCUs is
such that erasure begins when the memory is ex-
posed to light with a wave lengths shorter than ap-
proximately 4000Å. It should be noted that sun-
lights and some types of fluorescent lamps have
wavelengths in the range 3000-4000Å.
It is thus recommended that the window of the
MCUs packages be covered by an opaque label to
prevent unintentional erasure problems when test-
ing the application in such an environment.
The recommended erasure procedure of the
MCUs EPROM is the exposure to short wave ul-
traviolet light which have a wave-length 2537A.
The integrated dose (i.e. U.V. intensity x exposure
time) for erasure should be a minimum of 30W-
sec/cm2. The erasure time with this dosage is ap-
proximately 30 to 40 minutes using an ultraviolet
lamp with 12000µW/cm2 power rating. The
ST62E25C should be placed within 2.5cm (1Inch)
of the lamp tubes during erasure.
11/70
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