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PDF MC34701 Data sheet ( Hoja de datos )
| Número de pieza | MC34701 | |
| Descripción | 1.5 A Switch-Mode Power Supply with Linear Regulator | |
| Fabricantes | Freescale Semiconductor | |
| Logotipo |  |
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Freescale Semiconductor
Technical Data
1.5 A Switch-Mode Power
Supply with Linear Regulator
The 34701 provides the means to efficiently supply the Freescale
Power QUICC™ I, II, and other families of Freescale
microprocessors and DSPs. The 34701 incorporates a high-
performance switching regulator, providing the direct supply for the
microprocessor’s core, and a low dropout (LDO) linear regulator
control circuit providing the microprocessor I/O and bus voltage.
The switching regulator is a high-efficiency synchronous buck
regulator with integrated N-channel power MOSFETs to provide
protection features and to allow space-efficient, compact design.
The 34701 incorporates many advanced features; e.g., precisely
maintained up/down power sequencing, ensuring the proper
operation and protection of the CPU and power system.
Features
• Operating Voltage from 2.8 V to 6.0 V
• High-Accuracy Output Voltages
• Fast Transient Response
• Switcher Output Current Up to 1.5 A
• Undervoltage Lockout and Overcurrent Protection
• Enable Inputs and Programmable Watchdog Timer
• Voltage Margining via I2C™ Bus
• Reset with Programmable Power-ON Delay
• Pb-Free Packaging Designated by Suffix Code EK
I2C is a trademark of Philips Corporation.
MC33701
Rev 4.0, 05/2005
34701
POWER SUPPLY
INTEGRATED CIRCUIT
EK (Pb-FREE) SUFFIX
98AARH99137A
32-TERMINAL SOICW
ORDERING INFORMATION
Device
MC34701EK/R2
Temperature
Range (TA)
-40 to 85°C
Package
32 SOICW
Optional
2.8 V to 6.0 V Input
34701
VIN2 VIN1
VBD
VBST
RT
LDRV
CS
LDO
ADDR
SDA
SCL
GND
EN1
EN2
CLKSYN
CLKSEL
FREQ
LFB
RST
BOOT
SW
VOUT
PGND
INV
VDDI
Other
Circuits
Adjustable:
0.8 V to VIN -
Dropout
VDDH (I/Os)
MPC8xxx
VBST
PORESET
Adjustable:
0.8 V to VIN -
Dropout
VDDL (Core)
Figure 1. 34701 Simplified Application Diagram
* This document contains certain information on a new product.
Specifications and information herein are subject to change without notice.
© Freescale Semiconductor, Inc., 2005. All rights reserved.
1 page  
MAXIMUM RATINGS
MAXIMUM RATINGS
Table 2. Maximum Ratings
All voltages are with respect to ground unless otherwise noted. Exceeding these ratings may cause a malfunction or permanent
damage to the device.
Rating
Symbol
Value
Unit
Electrical Ratings
Supply Voltage
Switching Node Voltage
Buck Regulator Bootstrap Input Voltage (BOOT - SW)
Boost Regulator Output Voltage
Boost Regulator Drain Voltage
RST Drain Voltage
Enable Terminal Voltage at EN1, EN2
Logic Terminal Voltage at SDA, SCL
Analog Terminal Voltage
LDO, VOUT, RST
LDRV, LCMP, CS
Terminal Voltage at CLKSEL, ADDR, RT, FREQ, VDDI, CLKSYN, INV,
LFB
ESD Voltage (1)
Human Body Model
Machine Model
VIN1, VIN2
VSW
VIN(BOOT)
VBST
VBD
VRST
VEN
VLOG
VOUT
VLIN
VLOGIC
VESD
-0.3 to 7.0
-1.0 to 7.0
-0.3 to 8.5
-0.3 to 8.5
-0.3 to 9.5
-0.3 to 7.0
-0.3 to 7.0
-0.3 to 7.0
-0.3 to 7.0
-0.3 to 8.5
-0.3 to 3.6
±2000
±200
V
V
V
V
V
V
V
V
V
V
V
Thermal Ratings
Storage Temperature
Lead Soldering Temperature (2)
TSTG
TSOLDER
-65 to 150
260
°C
°C
Maximum Junction Temperature
TJMAX
125 °C
Thermal Resistance
Junction to Ambient (Single Layer) (3), (4)
Junction to Ambient (Four Layers) (3), (4)
RθJA
°C/W
70
55
Thermal Resistance, Junction to Base (5)
RθJB
18 °C/W
Operational Package Temperature (Ambient Temperature)
TA
-40 to 85
°C
Notes
1. ESD1 testing is performed in accordance with the Human Body Model (CZAP=100 pF, RZAP=1500 Ω), ESD2 testing is performed in
accordance with the Machine Model (CZAP=200 pF, RZAP=0 Ω), and the Charge Device Model.
2. Lead soldering temperature limit is for 10 seconds maximum duration.
3. Junction temperature is a function of on-chip power dissipation, package thermal resistance, mounting site (board) temperature,
ambient temperature, air flow, power dissipation of other components on the board and board thermal resistance.
4. Per JEDEC JESD51-6 with the board horizontal
5. Thermal resistance between the die and the printed circuit board per JEDEC JESD51-8. Board temperature is measured on the top
surface of the board near the package.
Analog Integrated Circuit Device Data
Freescale Semiconductor
34701
5
5 Page 
DYNAMIC ELECTRICAL CHARACTERISTICS
DYNAMIC ELECTRICAL CHARACTERISTICS
Table 4. DYNAMIC ELECTRICAL CHARACTERISTICS
Characteristics noted under conditions -40°C ≤ TA ≤ 85°C unless otherwise noted. Input voltages VIN1 = VIN2 = 3.3 V using
the typical application circuit (see Figures 33) unless otherwise noted.
Characteristic
Symbol Min Typ Max Unit
Buck Converter
Duty Cycle Range (Normal Operation) (17)
Switching Node SW Rise Time (17)
VIN = 5.0 V, ILOAD = 1.0 A
tD
tRISE
0 – 95 %
ns
– 7.0 –
Switching Node SW Fall Time (17)
VIN = 5.0 V, ILOAD = 1.0 A
tFALL
ns
– 17 –
Maximum Deadtime (17)
Buck Control Loop Propagation Delay (17)
VINV < 0.8 V to VSW > 90% of High Level or VINV > 0.8 V to VSW < 10%
of Low Level
tD
tPD
– 35 – ns
ns
– 50 –
Soft Start Duration (Power Sequencing Disabled, EN1 = 1, EN2 = 1) (17)
tSS
200 350 800 µs
Fault Condition Time-Out (17)
tFAULT
7.0
10
15 ms
Retry Timer Cycle (17)
tRET
70 100 150 ms
Oscillator
Oscillator Center Frequency(19)
RF = 11.3 kΩ
fOSC
270 300 330 kHz
Oscillator Frequency Range
Oscillator Frequency Adjusting Resistor Range
Oscillator Frequency Adjustment (18), (19)
RF = 7.0 kΩ
Oscillator Frequency Adjustment (18), (19)
RF = 22 kΩ
fOSC 200 – 400 kHz
RFREQ
7.0
–
22 kΩ
fOSC
400 –
kHz
–
fOSC
kHz
– – 200
Oscillator Default Frequency (Switching Frequency), FREQ Terminal Open
Oscillator Output Signal Duty Cycle (Square Wave, 180° Out-of-Phase with
the Internal Suitable Oscillator)
fOSC
DOSC
– 300 – kHz
%
40 50 60
Synchronization Pulse Minimum Duration (17)
Notes
17. Design information only. This parameter is not production tested.
18. see Figure 4 for more details
19. RF is RFREQ
tSYNC
1.0
–
– µs
Analog Integrated Circuit Device Data
Freescale Semiconductor
34701
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet MC34701.PDF ] | |
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