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부품번호 TE28F008 기능
기능 (TE28Fxxx) 3 Volt Advanced Boot Block Flash Memory
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TE28F008 데이터시트, 핀배열, 회로
3 Volt Advanced Boot Block Flash
Memory
28F004/400B3, 28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3
Preliminary Datasheet
Product Features
s Flexible SmartVoltage Technology
— 2.7 V–3.6 V Read/Program/Erase
— 12 V VPP Fast Production Programming
s 2.7 V or 1.65 V I/O Option
— Reduces Overall System Power
s High Performance
— 2.7 V–3.6 V: 70 ns Max Access Time
s Optimized Block Sizes
— Eight 8-KB Blocks for Data,Top or
Bottom Locations
— Up to One Hundred Twenty-Seven 64-
KB Blocks for Code
s Block Locking
— VCC-Level Control through WP#
s Low Power Consumption
— 9 mA Typical Read Current
s Absolute Hardware-Protection
— VPP = GND Option
— VCC Lockout Voltage
s Extended Temperature Operation
— –40 °C to +85 °C
s Automated Program and Block Erase
— Status Registers
s Intel® Flash Data Integrator Software
— Flash Memory Manager
— System Interrupt Manager
— Supports Parameter Storage, Streaming
Data (e.g., Voice)
s Extended Cycling Capability
— Minimum 100,000 Block Erase Cycles
Guaranteed
s Automatic Power Savings Feature
— Typical ICCS after Bus Inactivity
s Standard Surface Mount Packaging
— 48-Ball CSP Packages
— 40- and 48-Lead TSOP Packages
s Density and Footprint Upgradeable for
common package
— 4-, 8-, 16-, 32- and 64-Mbit Densities
s ETOX™ VII (0.18 µ) Flash Technology
— 28F160/320/640B3xC
— 4-, 8-, 16-, and 32-Mbit also exist on
ETOX™ V (0.4µ) and/or ETOX ™ VI
(0.25µ) Flash Technology
s x8 not recommended for new designs
s 4-Mbit density not recommended for new
designs
The 3 Volt Advanced Boot Block flash memory, manufactured on Intel’s latest 0.18 µm
technology, represents a feature-rich solution at overall lower system cost. The 3 Volt Advanced
Boot Block flash memory products in x16 will be available in 48-lead TSOP and 48-ball CSP
packages. The x8 option of this product family will only be available in 40-lead TSOP and 48-
ball µBGA* packages. Additional information on this product family can be obtained by
accessing Intel’s website at: http://www.intel.com/design/flash.
t4u.comNotice: This document contains preliminary information on new products in production. The
e specifications are subject to change without notice. Verify with your local Intel sales office that
e you have the latest datasheet before finalizing a design.
tash Order Number: 290580-012
www.da October 2000




TE28F008 pdf, 반도체, 판매, 대치품
28F004/400B3, 28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3
5.0 Reset Operations ..................................................................................................... 33
6.0 Ordering Information .............................................................................................. 34
7.0 Additional Information ........................................................................................... 36
Appendix A Write State Machine Current/Next States ................................................. 37
Appendix B Architecture Block Diagram ........................................................................... 38
Appendix C Word-Wide Memory Map Diagrams............................................................. 39
Appendix D Byte-Wide Memory Map Diagrams .............................................................. 45
Appendix E Program and Erase Flowcharts .................................................................... 48
iv 3UHOLPLQDU\

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TE28F008 전자부품, 판매, 대치품
28F004/400B3, 28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3
1.0 Introduction
This datasheet contains the specifications for the 3 Volt Advanced Boot Block flash memory
family, which is optimized for low power, portable systems. This family of products features
1.65 V–2.5 V or 2.7 V–3.6 V I/Os and a low VCC/VPP operating range of 2.7 V–3.6 V for read,
program, and erase operations. In addition this family is capable of fast programming at 12 V.
Throughout this document, the term “2.7 V” refers to the full voltage range 2.7 V–3.6 V (except
where noted otherwise) and “VPP = 12 V” refers to 12 V ±5%. Section 1.0 and 2.0 provide an
overview of the flash memory family including applications, pinouts and pin descriptions. Section
3.0 describes the memory organization and operation for these products. Sections 4.0 and 5.0
contain the operating specifications. Finally, Sections 6.0 and 7.0 provide ordering and other
reference information.
The 3 Volt Advanced Boot Block flash memory features:
Enhanced blocking for easy segmentation of code and data or additional design flexibility
Program Suspend to Read command
VCCQ input of 1.65 V–2.5 V on all I/Os. See Figures 1 through 4 for pinout diagrams and
VCCQ location
Maximum program and erase time specification for improved data storage.
Table 1. 3 Volt Advanced Boot Block Feature Summary
Feature
28F004B3(2), 28F008B3,
28F016B3
28F400B3(2), 28F800B3,
28F160B3, 28F320B3(3),
28F640B3
VCC Read Voltage
2.7 V– 3.6 V
VCCQ I/O Voltage
VPP Program/Erase Voltage
Bus Width
Speed
Memory Arrangement
Blocking (top or bottom)
Locking
Operating Temperature
Program/Erase Cycling
Packages
1.65 V–2.5 V or 2.7 V– 3.6 V
2.7 V– 3.6 V or 11.4 V– 12.6 V
8 bit 16 bit
70 ns, 80 ns, 90 ns, 100 ns, 110 ns
512 Kbit x 8 (4 Mbit)
1024 Kbit x 8 (8 Mbit),
2048 Kbit x 8 (16 Mbit)
256 Kbit x 16 (4 Mbit),
512 Kbit x 16 (8 Mbit),
1024 Kbit x 16 (16 Mbit),
2048 Kbit x 16 (32 Mbit),
4096 Kbit x 16 (64 Mbit)
Eight 8-Kbyte parameter blocks and
Seven 64-Kbyte blocks (4 Mbit) or
Fifteen 64-Kbyte blocks (8 Mbit) or
Thirty-one 64-Kbyte main blocks (16 Mbit)
Sixty-three 64-Kbyte main blocks (32 Mbit)
One hundred twenty-seven 64-Kbyte main blocks (64 Mbit)
WP# locks/unlocks parameter blocks
All other blocks protected using VPP
Extended: –40 °C to +85 °C
100,000 cycles
40-lead TSOP(1),
48-Ball µBGA* CSP(2)
48-Lead TSOP,
48-Ball µBGA CSP(2),
48-Ball VF BGA(4)
NOTES:
1. 32-Mbit and 64-Mbit densities not available in 40-lead TSOP.
2. 4-Mbit density not available in µBGA* CSP.
3. VCCMax is 3.3 V on 0.25µm 32-Mbit devices.
4. 4- and 64-Mbit densities not available on 48-Ball VF BGA.
Reference
Section 4.2,
Section 4.4
Section 4.2, 4.4
Section 4.2, 4.4
Table 3
Section 4.5
Section 2.2
Section 2.2
Appendix C
Section 3.3
Table 8
Section 4.2, 4.4
Section 4.2, 4.4
Figure 3, Figure 4
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