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PDF IP178A Data sheet ( Hoja de datos )

Número de pieza IP178A
Descripción 8-Port 10/100 Ethernet Integrated Switch
Fabricantes IC Plus 
Logotipo IC Plus Logotipo



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(Advance Version
IP178A
8-Port 10/100 Ethernet Integrated Switch
Feature
Three-in-one 8 port 10/100 Ethernet switch
- Built in an 8 port Ethernet switch engine
- Built in 8 10/100M transceivers
- Built in SSRAM
Support flow control
- Support IEEE802.3x for full duplex mode operation
- Support backpressure for half duplex mode
operation
Built in up to 1K MAC address
An 8 port switching fabric
- Support two-level hashing algorithm to improve
address collision
- Support address aging
- Store and forward mode
- Broadcast storm protection
- Full line speed capability of 148800 (14880)
packets/sec for 100M (10M)
- Support 1536 byte data transfer for VLAN traffic
- Support one MII port
- Support port base VLAN
- Support CoS
DSP approach transceivers
- Auto negotiation
- Fully digital adaptive equalizer and timing recovery
module
- Base line Wander correction
om- 10BaseT, 100BaseT, and 100BaseFX(port6, port7
.conly) operation
t4u- Automatic MDI/MDI-X configuration
eLED status of Link, Receive, Full duplex, and Speed
heLED with power on diagnostic function
tasSet operation parameters via pins or EEPROM
.daPreliminary, Specification subject to change without notice
IP178A-DS-P05
wwwSep. 09, 2002
1
interface
Utilize single clock source (25Mhz)
Utilize single power supply (2.5v)
0.25um technology
Packaged in 208 pin PQFP
General Description
IP178A is an 8 port 10/100 Ethernet integrated switch. It
consists of an 8-port switch controller and eight Fast
Ethernet transceivers. Each of the transceivers complies
with the IEEE802.3, IEEE802.3u, and IEEE802.3x
specifications. The transceivers in IP178A are designed
in DSP approach with advance 0.25um technology; this
results in high noise immunity and robust performance.
Two ports of IP178A can be configured as 100BaseFX.
The IP178A operates in store and forward mode. It
stores the incoming packet to the internal SSRAM and
learns the SA (source address) automatically if the
packet is error free. The SA is stored to the internal
address table. IP178A forwards a packet according to DA
and address table. When the segments of destination
ports are free, it reads the packet from the internal
SSRAM and forwards it to the appropriate ports
according to the address table. The incoming packets
with errors are dropped. IP178A supports IEEE802.3x,
optional backpressure, Auto MDI/MDI-X, CoS, port base
VLAN, one MII port and various LED functions, etc.
These functions can be configured to fit the different
requirements by feeding operation parameters via
EEPROM interface or pull up/down resistors on specified
pins.

1 page




IP178A pdf
(Advance Version)
IP178A
PIN Description
Type
I
IPL
IPH
O
I/O
Description
Input pin
Input pin with internal pull low
Input pin with internal pull high
Output pin
Input and Output pin
Pin no.
Label
MLT3 signals
25 BGRES
52, 76
FXSD6
FXSD7
189, 190,
205, 204, 4,
5, 20, 19,
32, 33, 48,
47, 56, 57,
72, 71
RXIP0~7
RXIM0~7
Type
Description
I Band gap resister
It is connected to GND through a 6.19k (1%) resistor in application circuit.
I 100Base-FX signal detect
Fiber signal detect of port 6 and 7 when the ports are configured to be fiber ports.
Fiber signal detect is active if the voltage of FXSD is higher than 1.2v. If TP mode
is selected, the pins must be connected to ground.
I TP receive
195, 196,
199, 198,
10,11, 14,
13, 38, 39,
42, 41, 62,
63, 66, 65
TXOP0~7
TXOM0~7
O TP transmit
Preliminary, Specification subject to change without notice 5
IP178A-DS-P05
Sep. 09, 2002

5 Page





IP178A arduino
(Advance Version)
IP178A
PIN Description (continued)
Pin no.
Label
Type
Description
Basic operation parameter setting of switch
170
BK_EN
IPH/O Backpressure enable
1: enable (default), 0: disable
This pin is input to set backpressure during reset. It becomes an output signal
MRXD2 after reset, if external MII port is enabled.
168, 169
167
BP_KIND[1:0]
X_EN
IPL/O Backpressure type selection
00: carrier base backpressure (default)
01: (reserved)
10: (reserved)
These two pins are input during reset. It becomes output signals MRXD0 and
MRXD1 after reset, if external MII port is enabled. IP178A supports carrier base
backpressure only.
IPH/O IEEE 802.3x flow control enable
1: enable (default), 0:disable
This pin is an input to set flow control during reset. It becomes an output signal
MCOL after reset, if external MII port is enabled.
163 BF_STM_EN IPL Broadcast storm enable
1: enable, 0: disable (default)
IP178A drops the incoming packet if the number of broadcast packet in queue is
over the threshold.
162
DROP16
IPL Drop the transmitting packet after 16 consecutive collisions
1: drop, 0: not drop (default)
161
TWOPART
IPH Turn on twopartD (Twopart)
1: enable (fixed), 0: disable
IP178A examine the carrier for 64 bits only during its back off period if this
function is enabled. It makes IP178A have higher priority in a collision event.
IP178A uses the default value. User can’t change the setting.
141 MODBCK IPH/O Aggressive back off enable (MODBCK)
IP178A uses modified (aggressive) back off algorithm if this function is enabled.
The maximum back off period is limited to 8-slot time. It makes IP178A have
higher priority in a collision event.
1: aggressive mode enable (default),
0: standard back off
It is link LED of port 4 after reset if LED direct mode is selected.
138 ALLPASS IPL/O It is for testing only. This pin should be left open to turn off the function for normal
operation.
It is link LED of port 5 after reset if LED direct mode is selected.
Preliminary, Specification subject to change without notice 11
IP178A-DS-P05
Sep. 09, 2002

11 Page







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