Datasheet.kr   

GM71V65163C 데이터시트 PDF




Hynix Semiconductor에서 제조한 전자 부품 GM71V65163C은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


 

PDF 형식의 GM71V65163C 자료 제공

부품번호 GM71V65163C 기능
기능 (GM71VS65163CL / GM71V65163C) 4M x 16-Bit MOS DRAM
제조업체 Hynix Semiconductor
로고 Hynix Semiconductor 로고


GM71V65163C 데이터시트 를 다운로드하여 반도체의 전기적 특성과 매개변수에 대해 알아보세요.




전체 10 페이지수

미리보기를 사용할 수 없습니다

GM71V65163C 데이터시트, 핀배열, 회로
GM71V65163C
GM71VS65163CL
4,196,304 WORDS x 16 BIT
MOS DYNAMIC RAM
Description
Pin Configuration
The GM71V(S)65163C/CL is the new generation
dynamic RAM organized 4,196,304 words by 16
bits. The GM71V(S)65163C/CL utilizes advanced
CMOS Silicon Gate Process Technology as well as
advanced circuit techniques for wide operating
margins, both internally and to the system user.
System oriented features include single power supply
of 3.3V+/-10% tolerance, direct interfacing
capability with high performance logic families such
as Schottky TTL.
The GM71V(S)65163C/CL offers Extended Data
Out(EDO) Mode as a high speed access mode.
50 SOJ / TSOP-II
VCC 1
IO0 2
IO1 3
IO2 4
IO3
VCC
IO4
IO5
5
6
7
8
IO6 9
IO7 10
NC 11
VCC 12
Features
/WE 13
/RAS 14
* 4,196,304 Words x 16 Bit
* Extended Data Out (EDO) Mode Capability
* Fast Access Time & Cycle Time
(Unit: ns)
NC 15
NC 16
NC 17
NC 18
A0 19
tRAC tAA tCAC tRC
tHPC
A1 20
A2 21
GM71V(S)65163C/CL-5 50 25 13 90 20
GM71V(S)65163C/CL-6 60 30 15 110 25
A3 22
A4 23
A5 24
VCC 25
*Power dissipation
- Active : 540mW/504mW(MAX)
- Standby : 1.8 mW ( CMOS level : MAX )
0.54mW ( L-Version : MAX)
*EDO page mode capability
*Access time : 50ns/60ns (max)
*Refresh cycles
- RAS only Refresh
4096 cycles/64 ms (GM71V65163C)
4096 cycles/128ms (GM71VS65163CL)(L_Version)
*CBR & Hidden Refresh
4096 cycles/64 ms (GM71V65163C)
m4096 cycles/128 ms (GM71VS65163CL)( L-Version )
o*4 variations of refresh
.c-RAS-only refresh
u-CAS-before-RAS refresh
t4-Hidden refresh
-Self refresh (L-Version)
ee*Single Power Supply of 3.3V+/-10 % with a built-in VBB generator
h*Battery Back Up Operation ( L-Version )
www.datasRev 0.1 / Apr’01
(Top View)
50 VSS
49 IO15
48 IO14
47 IO13
46 IO12
45 VSS
44 IO11
43 IO10
42 IO9
41 IO8
40 NC
39 VSS
38 /LCAS
37 /UCAS
36 /OE
35 NC
34 NC
33 NC
32 A11
31 A10
30 A9
29 A8
28 A7
27 A6
26 VSS




GM71V65163C pdf, 반도체, 판매, 대치품
Capacitance (VCC = 3.3V+/-10%, TA = 25C)
GM71V65163C
GM71VS65163CL
Symbol
CI1
Parameter
Input Capacitance (Address)
Typ Max Unit Note
- 5 pF 1
CI2 Input Capacitance (Clocks)
- 7 pF 1
CI/O
Output Capacitance (Data-in,Data-Out) -
7 pF 1, 2
Note: 1. Capacitance measured with Boonton Meter or effective capacitance measuring method.
2. RAS, UCAS and LCAS = VIH to disable DOUT.
AC Characteristics (VCC = 3.3V+/-10%, TA = 0 ~ 70C, Notes 1, 2,19,20)
Test Conditions
Input rise and fall times : 2ns
Output timing reference levels : VOL/VOH = 0.8/2.0V
Input level : VIL/VIH = 0.0/3.0V
Output load : 1 TTL gate+CL (100pF)
Input timing reference levels : VIL/VIH = 0.8/2.0V
(Including scope and jig)
Read, Write, Read-Modify-Write and Refresh Cycles (Common Parameters)
Symbol
Parameter
GM71V(S)65163C/CL-5 GM71V(S)65163C/CL-6
Min Max Min Max
Unit
Notes
tRC Random Read or Write Cycle Time
84
- 104 - ns
tRP RAS Precharge Time
30 -
40 - ns
tCP CAS Precharge Time
8 - 10 - ns 24
tRAS RAS Pulse Width
50
10000
60
10000
ns
tCAS CAS Pulse Width
8
10000
10
10000
ns
tASR Row Address Set-up Time
0 - 0 - ns
tRAH Row Address Hold Time
8 - 10 - ns
tASC Column Address Set-up Time
0 - 0 - ns 21
tCAH Column Address Hold Time
8 - 10 - ns 21
tRCD RAS to CAS Delay Time
12 37 14 45 ns 3
tRAD RAS to Column Address Delay Time
tRSH RAS Hold Time
10
13
25 12 30 ns 4
- 15 - ns
tCSH CAS Hold Time
35 - 40 - ns
tCRP CAS to RAS Precharge Time
5 - 5 - ns 22
tODD OE to DIN Delay Time
13 - 15 - ns 5
tDZO OE Delay Time from DIN
0 - 0 - ns 6
tDZC CAS Delay Time from DIN
0 - 0 - ns 6
tT TransitionTime (Rise and Fall)
tREF Refresh Period
Refresh Period ( L-Version )
2 50 2 50 ns 7
-
64
-
64
ms 4096
cycles
-
128
-
128
ms
4096
cycles
Rev 0.1 / Apr’01

4페이지










GM71V65163C 전자부품, 판매, 대치품
Extended Data Out Mode Cycles
Symbol
Parameter
tHPC EDO Page Mode Cycle Time
tWPE
tRASP
Write pulse width during CAS Precharge
EDO Mode RAS Pulse Width
tACP Access Time from CAS Precharge
tRHCP RAS Hold Time from CAS Precharge
tCOL CAS Hold Time Referred OE
tCOP CAS to OE set-up Time
tRCHP
tDOH
tOEP
Read Command Hold Time from CAS
Precharge
Output Data Hold Time from CAS Low
OE Precharge Time
GM71V65163C
GM71VS65163CL
GM71V(S)65163C/CL-5 GM71V(S)65163C/CL-6
Unit
Min Max Min Max
Notes
20 - 25 - ns 25
-
8 - 10 - ns
- 100000 - 100000 ns 16
- 28 - 35 ns 9,17,22
28 - 35 - ns
8 - 10 - ns
5 - 5 - ns
28 - 35 - ns
3 - 3 - ns 9,27
8 - 10 - ns
EDO Page Mode Read-Modify-Write cycle
Symbol
Parameter
GM71V(S)65163C/CL-5 GM71V(S)65163C/CL-6
Unit
Min Max Min Max
Notes
tHPRWC EDO Read-Modify-Write Cycle Time 57 - 68 - ns
tCPW EDO Page Mode Read-Modify-Write Cycle 45
CAS Precharge to WE Delay Time
- 54 - ns 14,22
Self Refresh Cycles (L_Version)
Symbol
Parameter
tRASS
tRPS
tCHS
RAS Pulse Width(Self-Refresh)
RAS Precharge Time(Self-Refresh)
CAS Hold Time(Self-Refresh)
GM71V(S)65163C/CL-5
Min Max
GM71V(S)65163C/CL-6
Unit
Min Max
Notes
100 - 100 - us 31
90 - 110 - us 31
-50 - -50 - us 23
Rev 0.1 / Apr’01

7페이지


구       성 총 10 페이지수
다운로드[ GM71V65163C.PDF 데이터시트 ]

당사 플랫폼은 키워드, 제품 이름 또는 부품 번호를 사용하여 검색할 수 있는

포괄적인 데이터시트를 제공합니다.


구매 문의
일반 IC 문의 : 샘플 및 소량 구매
-----------------------------------------------------------------------

IGBT, TR 모듈, SCR 및 다이오드 모듈을 포함한
광범위한 전력 반도체를 판매합니다.

전력 반도체 전문업체

상호 : 아이지 인터내셔날

사이트 방문 :     [ 홈페이지 ]     [ 블로그 1 ]     [ 블로그 2 ]



관련 데이터시트

부품번호상세설명 및 기능제조사
GM71V65163A

(GM71VS65163AL / GM71V65163A) 4M x 16-Bit CMOS DRAM

Hynix Semiconductor
Hynix Semiconductor
GM71V65163C

(GM71VS65163CL / GM71V65163C) 4M x 16-Bit MOS DRAM

Hynix Semiconductor
Hynix Semiconductor

DataSheet.kr       |      2020   |     연락처      |     링크모음      |      검색     |      사이트맵