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PDF DPS128C32BV3 Data sheet ( Hoja de datos )

Número de pieza DPS128C32BV3
Descripción 512kx8 High Speed CMOS SRAM
Fabricantes Dense-Pac Microsystems 
Logotipo Dense-Pac Microsystems Logotipo



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No Preview Available ! DPS128C32BV3 Hoja de datos, Descripción, Manual

4 Megabit High Speed CMOS SRAM
DPS128C32BV3
DESCRIPTION:
The DPS128C32BV3 ‘’VERSA-STACK’’ module is a
revolutionary new high speed memory subsystem using
Dense-Pac Microsystems’ ceramic Stackable Leadless Chip
Carriers (SLCC) mounted on a co-fired ceramic substrate.
It offers 4 Megabits of SRAM in a package envelope of
1.090 x 1.090 x 0.300 inches.
The DPS128C32BV3 contains four individual 128K x 8
SRAMs, packaged in their own hermetically sealed SLCCs
making the module suitable for commercial, industrial and
military applications.
By using SLCCs, the ‘’Versa-Stack’’ family of modules offers
a higher board density of memory than available with
conventional through-hole, surface mount, module, or
hybrid techniques.
FEATURES:
Organizations Available:
128K x 32, 256K x 16, or
512K x 8
Access Times:
20, 25, 30, 35, 45ns
Fully Static Operation
- No clock or refresh required
Single +5V Power Supply,
±10% Tolerance
TTL Compatible
FUNCTIONAL BLOCK DIAGRAM
Common Data Inputs
and Outputs
Low Data Retention Voltage:
2.0V min.
66-Pin PGA ‘’VERSA-STACK’’
w Package
w * Commercial only.
w. PIN NAMES
D A0 - A16
aI/O0 - I/O31
CE0 - CE3
taWE0 - WE3
OE
SVDD
hVSS
eN.C.
Address Inputs
Data Input/Output
Chip Enables
Write Enables
Output Enable
Power (+5V)
Ground
No Connect
PIN-OUT DIAGRAM
et30A044-28
4U.comREV. F
This document contains information on a product that is currently released
to production at Dense-Pac Microsystems, Inc. Dense-Pac reserves the right
to change products or specifications herein without prior notice.
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DPS128C32BV3 pdf
Dense-Pac Microsystems, Inc.
ADDRESS
CE
WE
DATA IN
DATA OUT
WRITE CYCLE 1: CE Controlled.
DPS128C32BV3
ADDRESS
CE
WE
DATA IN
DATA OUT
WRITE CYCLE 2: WE Controlled. OE is HIGH. 8
30A044-28
REV. F
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