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DPS128X32XP 데이터시트 PDF




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부품번호 DPS128X32XP 기능
기능 4M CMOS SRAM
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DPS128X32XP 데이터시트, 핀배열, 회로
4 Megabit CMOS SRAM
DPS128X32XP/XHP
DESCRIPTION:
The DPS128X32XP/XHP is a 68-pin surface mount
module consisting of four 128K x 8 SRAM devices in
plastic TSOP packages surface mounted on a FR-4
substrate.
The module is available with either “J”-Leads or
“Gull”-Leads.
FEATURES:
Organizations Available:
512K x 8, 256K x 16 or 128K x 32
Access Times:
15, 20, 25, 35ns
Fully Static Operation - No clock or refresh required
TTL-compatible
68-Pin Surface Mount Module
PIN NAMES
A0 - A16
Address Inputs
I/O0 - I/O31 Data Input/Output
CE0 - CE3
Low Chip Enables
WE0 - WE3
Write Enables
OE Output Enable
VDD Power (+5V)
PIN-OUT DIAGRAM
VSS Ground
N.C. No Connect
ww FUNCTIONAL BLOCK DIAGRAM
w.DataSheet430A167-00
U.comREV. A
This document contains information on a product that is currently released
to production at Dense-Pac Microsystems, Inc. Dense-Pac reserves the
right to change products or specifications herein without prior notice.
1




DPS128X32XP pdf, 반도체, 판매, 대치품
DPS128X32XP/XHP
Dense-Pac Microsystems, Inc.
AC OPERATING CONDITIONS AND CHARACTERISTICS - WRITE CYCLE 6, 7: Over operating ranges
No. Symbol
Parameter
15ns
Min. Max.
20ns
Min. Max.
25ns
Min. Max.
35ns
Min. Max.
10 tWC Write Cycle Time
11 tAW Address Valid to End of Write
12 tCW Chip Enable to End of Write
13 tAS Address Set-Up Time *
14 tWP Write Pulse Width
15 tWR Write Recovery Time, CE, WE
16 tWHZ Write Enable to Output in HIGH-Z 4, 5
17 tDW Data to Write Time Overlap
18 tDH Data Hold from Write Time
19 tOW Output Active from End of Write
15 20 25 35
12 15 20 30
12 15 20 30
0000
11 12 15 20
0000
7 10 12 15
8 10 12 12
0000
2222
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
* Valid for both Read and Write Cycles.
WRITE CYCLE 1: CE Controlled.
ADDRESS
CE
WE
DATA IN
DATA OUT
NOTES:
1. All voltages are with respect to VSS.
2. -2.0V min. for pulse width less than 20ns (VIL min. = -0.5V
at DC level).
3. Stresses greater than those under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device.
This is a stress rating only and functional operation of the
device at these or any other conditions above those
indicated in the operational sections of this specification is
not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
4. This parameter is guaranteed and not 100% tested.
5. Transition is measured at the point of ±500mV from steady
state voltage.
6. When OE and CE are LOW and WE is HIGH, I/O pins are
in the output state,and input signals of opposite phase to
the outputs must not be applied.
7. The outputs are in a high impedance state when WE is
LOW.
4 30A16700
REV. A

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관련 데이터시트

부품번호상세설명 및 기능제조사
DPS128X32XP

4M CMOS SRAM

DPAC Technologies
DPAC Technologies

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