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PDF ILA8351 Data sheet ( Hoja de datos )
| Número de pieza | ILA8351 | |
| Descripción | Vertical Deflection and Guard Amplifier | |
| Fabricantes | IK Semiconductor | |
| Logotipo |  |
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TECHNICAL DATA
DC-COUPLED VERTICAL DEFLECTION CIRCUIT
FEATURES
GENERAL DESCRIPTION
• Few external components
The ILA8351 is a power circuit for use in 90°
• Highly efficient fully DC-coupled vertical output
and 110°
bridge circuit
colour deflection systems for field frequencies
• Vertical flyback switch
• Guard circuit
• Protection against:
– short-circuit of the output pins (7 and 4)
of 50 to
120 Hz. The circuit provides a DC driven
vertical deflection output circuit, operating as a
highly efficient class G system.
– short-circuit of the output pins to VP
• Temperature (thermal) protection
• High EMC immunity because of common mode
minputs
• A guard signal in zoom mode.
.coQUICK REFERENCE DATA
USYMBOL
PARAMETER
CONDITIONS MIN. TYP. MAX. UNIT
t4DC supply
Vp
eIq
eVertical circuit
supply voltage
quiescent supply current
9 - 25 V
- 30 - mA
hl o(p-p)
SI diff(p-p)
taV diff(p-p)
aFlyback switch
output current
(peak-to-peak value)
differential input current (peak-
to-peak value)
differential input voltage
(peak-to-peak value)
— —3
A
— 600 — µA
—
1.5 1.8
V
.DIM peak output current
Vfb flyback supply voltage
wThermal data (in accordance with IEC 747-1)
note 1
- - ±1.5 A
- - 50 V
- - 60 V
wT stg storage temperature
wlamb operating ambient temperature
-55 -
-25 -
+150
+75
°C
°C
Tvj virtual junction temperature
- - 150 °C
Note
A flyback supply voltage of >50 V up to 60 V is allowed in application. A 220 nF capacitor
in series with a 22 Ω resistor (dependent on Io and the inductance of the coil) has to be
connected between pin 7 and ground. The decoupling capacitor of VFB has to be
connected between pin 6 and pin 3. The supply voltage line must have a resistance of 33
Ω.
1
1 page  
ILA8351
CHARACTERISTICS
Vp = 17.5 V; Tamb = 25 0C; VFB = 45 V; tj = 50 Hz; II(sb) = 400 µA.
SYMBOL
PARAMETER
DC supply
VP operating supply voltage
VFB flyback supply voltage
Iq supply current
Vertical circuit
VO output voltage swing (scan)
LE linearity error
VO
VDF
I Ios I
output voltage swing (flyback)
VO(A) - VO(B)
forward voltage of the internal
efficiency diode (VO(A) - VFB)
output offset current
I Vos I
∆VosT
VO(A)
Gvo
VR
tres
Gi
∆GCT
II(sb)
IFB
PSRR
VI(DC)
VICM)
Ibias
IO(CM)
offset voltage at the input of the
feedback amplifier (VI(fb) - VO(B))
output offset voltage as a function
of temperature
DC output voltage
open-loop voltage gain (V7-4/V1-2))
open loop voltage gain(V7-4/V1-2);
V1-2 = 0)
voltage ratio V1-2/V9-4
frequency response (-3 dB)
current gain (IO/Idiff)
current gain drift as a function of
temperature
signal bias current
flyback supply current
power supply ripple rejection
DC input voltage
common mode input voltage
input bias current
common mode output current
Guard circuit
IO output current
VO(guard)
output voltage on pin 8
allowable voltage on pin 8
CONDITIONS
MIN.
note 1
no signal; no load
9.0
VP
VP
-
Idiff = 0.6 mA (p-p);
Vdiff = 1.8 V (p-p);
IO = 3 A (p-p)
IO = 3 A (p-p); note 2
IO = 50 mA (p-p); note 2
Idiff = 0.3 mA;
IO = 1.5 A (M)
IO = -1.5 A (M)
Idiff = 0.3 mA
Idiff = 0;
II(sb) = 50 to 500 µA
Idiff = 0;
II(sb) = 50 to 500 µA
Idiff = 0
19.8
-
-
-
-
-
-
-
Idiff = 0; note 3
notes 4 and 5
note 4
-
-
-
open loop; note 6
-
-
-
-
during scan
note 7
II(sb)= 0
II(sb)= 0
∆ II(sb) = 300 µA (p-p);
fi = 50 Hz; Idiff = 0
not active;
VO(guard) = 0 V
active; VO(guard) = 4.5 V
IO = 100 µA
maximum leakage
current = 10 µA;
50
-
-
-
0
-
-
-
1
-
-
TYP. MAX. UNIT
- 25 V
- 50 V
- 60 V
30 55 mA
- -V
1
1
39
-
-
-
-
8.0
80
80
0
40
5000
-
400
-
80
2.7
-
0.1
0.2
2%
2%
-V
1.5 V
30 mA
18 mV
72 µV/K
-V
- dB
- dB
- dB
- Hz
-
10-4
K
500 µA
100 µA
- dB
-V
1.6 V
0.5 µA
- mA
- 50 µA
- 2.5 mA
- 5.5 V
- 40 V
Notes
1. A flyback supply voltage of >50 V up to 60 V is allowed in application. A 220 nF capacitor in series with
a 22 Ω resistor (dependent on Io and the inductance of the coil) has to be connected between pin 7 and
ground. The decoupling capacitor of VFB has to be connected between pin 6 and pin 3. The supply voltage
line must have a resistance of 33 Ω.
2. The linearity error is measured without S-correction and based on the same measurement principle as
performed on the screen. The measuring method is as follows:
5
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| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet ILA8351.PDF ] | |
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