PDF ML2302 Data sheet ( Hoja de datos )

Número de pieza	ML2302
Descripción	Recording and Playback LSI
Fabricantes	OKI Semiconductor
Logotipo
Hay una vista previa y un enlace de descarga de ML2302 (archivo pdf) en la parte inferior de esta página. Total 24 Páginas
No Preview Available ! OKI Semiconductor ML2302 Recording and Playback LSI with Built-in 2-Bit ADPCM2 Supported FIFO FEDL2302DIGEST-05 Issue Date: Dec. 27, 2004 GENERAL DESCRIPTION The ML2302 is a recording and playback LSI with built-in FIFO memories for buffering. It employs the new 2-bit ADPCM2 algorithm in addition to conventional 4-bit OKIADPCM and 4-bit OKIADPCM2 algorithms. The ML2302 operates at 2.7 to 3.6 V and supports a variety of applications. FEATURES • Built-in two 1024-bit FIFOs (buffering time of 32 ms when using 8 kHz sampling frequency and 4-bit ADPCM) • Supports five compression algorithms for recording and playback: 2-bit OKIADPCM2; 4/5/6/7-bit OKIADPCM2; 4-bit OKIADPCM; 8/16-bit straight PCM; 8-bit OKI Nonlinear PCM • Source oscillation frequency 16.384 MHz • Sampling frequency (fsam) 4.0 to 12.8 kHz (OKIADPCM2) 4.0 to 25.6 kHz (8-bit straight PCM) • Supports 8-bit bus interface. • Built-in voice level detection function (VAC) • Built-in noise injection function • Supports external DAC interface. • Built-in volume control circuit (0 dB to –44 dB: –2 dB step, –44 dB to –80 dB: –4 dB step) • Built-in 14-bit A/D converter and 14-bit D/A converter • Built-in low pass filter (LPF) (recording side: analog filter, playback side: digital filter) • Built-in speaker amplifier (100 mW, 8Ω) • Power supply voltage : +2.7 to +3.6 V • Package : 64-pin plastic TQFP (TQFP64-P-1010-0.50-K) (ML2302TB) : 71-pin W – CSP 1/24 1 page OKI Semiconductor FEDL2302DIGEST-05 ML2302 PIN DESCRIPTIONS Pin (WCSP) H2, G2, F2, G1, F3, F1, E2, E1 G7 Pin (TQFP) 1 to 8 47 H9 48 J2 64 G3 63 H3 62 E7 41 F8 43 F7 44 G9 45 F9 42 H5 55 J5 56 G6 54 J6 53 H4 59 G4 60 Symbol D7 to 0 WR RD CS D/C BUSY CBUSY EMP MID FUL CH DREQL DACKL IOW IOR ADSD DASD Type Description Bidirectional data bus. Command and data inputs from an external microcontroller and I/O memory, and status and data outputs to an external microcontroller and memory. Write pulse input pin. This pin pulses “L” when command or I voice data is input to D7 to D0 pins. I Read pulse input pin. This pin pulses “L” when status or voice data is output to D7 to D0. I Accepts write pulse and read pulse when this pin is “L”. I Voice data is input or output to and from D7 to D0 when this pin is “H”. O This pin outputs a “L” level during RECORDING, PLAYBACK, or PAUSE. O Accepts a command during this pin is “H”. “H” indicates that there is no data in FIFO memory. O During playback, voice synthesis starts when EMP changes to “L”. Active “H” can be changed to active “L”. O “H” level indicates that there is more than half of the FIFO memory. “H” level indicates that FIFO memory is full of data. During playback, this pin is “H” and data cannot be written in FIFO O memory. During recording, data is not written after FIFO memory is full of data. Active “H” can be changed to active “L”. I This pin should be set at a “L” level normally and be set at a “H” level when DMA is used. When DMA transfer is selected, “H” level DREQL outputs a O signal to request a DMA transfer. Active “H” can be changed to active “L”. Input to DACKL a signal when DMA transfer is permitted by the DMA controller. when DACKL is “L”, IOW and IOR signals are I accepted. Active “L” can be changed to active “H” by command input. If DMA transfer is not used, set this pin to “H” level. Write pulse Input pin to write external memory data to ML2302 I during DMA transfer. If DMA transfer is not used, set this pin to “H” level. Read pulse input pin to read data of ML2302 during DMA I transfer. If DMA transfer is not used, set this pin to “H” level. I 16-bit serial data input pin when external A/D converter is used. If external A/D converter is not used, set this pin to “L” level. O 16-bit serial data input pin when external D/A converter is used. 5/24 5 Page OKI Semiconductor FEDL2302DIGEST-05 ML2302 FUNCTIONAL DESCRIPTION Voice Synthesis Algorithms The ML2302 supports five PCM algorithms to process various kinds of voices. 1. 4-bit OKIADPCM algorithm 2. 4/5/6/7/8-bit OKIADPCM2 algorithm 3. 2-bit OKIADPCM algorithm 4. 8/16-bit straight PCM algorithm 5. 8-bit OKI Non-linear PCM algorithm Voice Synthesis Algorithms and Sampling Frequencies during Recording and Playback The relationships between the voice synthesis algorithms and sampling frequencies available during recording and playback are shown in Tables 1.1.1 and 1.1.2. Table 1.1.1 During Recording fsam (kHz) Voice 4.0 5.3 6.1 6.4 8.0 9.8 10.7 11.6 12.8 14.2 16.0 18.3 21.3 25.6 synthesis algorithm 4-bitADPCM 4/5/6/7/8-bitADPCM2 2-bitADPCM2 8-bit straight PCM 16-bit straight PCM 8-bit Non-linear PCM °°°°° °°°°° °°°°° °°°°° °°°°° °°°°° °°°°° °°°°° °°°°° × × × °° × × × °° × × × °° × × × ° × × × × ° × ×××××× × × × × × × × × Table 1.1.2 During Playback fsam (kHz) Voice 4.0 5.3 6.1 6.4 8.0 9.8 10.7 11.6 12.8 14.2 16.0 18.3 21.3 25.6 synthesis algorithm 4-bitADPCM 4/5/6/7/8-bitADPCM2 2-bitADPCM 8-bit straight PCM 16-bit straight PCM 8-bit Non-linear PCM °°°°°° °°°°°° °°°°°° °°°°°° °°°°°° °°°°°° °°°°°° °°°°°° °°°°°° × × × °°° × × × °°° × × × °°° × × × ° × × × × × ° × × 11/24 11 Page

Páginas	Total 24 Páginas
PDF Descargar	[ Datasheet ML2302.PDF ]

Hoja de datos destacado

Número de pieza	Descripción	Fabricantes
ML2302	Recording and Playback LSI	OKI Semiconductor
ML2308	Stereo Recording / Playback LSI	OKI Semiconductor

Número de pieza	Descripción	Fabricantes
SLA6805M	High Voltage 3 phase Motor Driver IC.	Sanken
SDC1742	12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters.	Analog Devices

DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares,
permitiéndote verlos en linea o descargarlos en PDF.

DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar