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IQX240B 데이터시트 PDF




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IQX240B 데이터시트, 핀배열, 회로
et4U.com IQX Family Data SheetFEATURES
heSRAM-based, in-system programmable
taSSwitch Matrix
a— Non-Blocking
.D— Identical and predictable delays
— One-to-one, one-to-many and many-to-one connections
wwRapidConfigure™ parallel interface for fast, incremental
w configuration of Switch Matrix and I/O Port attributes
m— 100% JTAG compliant
Clocked, Latched and Flow-through Dataflow Modes
o— As low as 7.5 ns pin-to-pin delay in flow-through mode
.cand 133 MHz clock rate in registered mode
I/O Ports
— Individually programmable as input, output or
Ubidirectional
t4— For each I/O Port, clock, clock enable, input enable and
output enable can be selected independently from a large
epool of common control signals
— 12 mA current drive
e— Separated I/O power pins for easy interfacing between
h5V and 3.3V signals
DESCRIPTION
The IQX family of SRAM-based bit-oriented switching devices is
manufactured using a 0.6µ m CMOS process. These devices
offer clock speeds of up to 133 MHz and pin-to-pin delay as low
as 7.5 ns.
The IQX devices are used in applications requiring dynamic
switching and flexible routing / interconnection of signals. These
applications include communication switches, network systems,
DSP / image processing engines and file/video servers.
At the heart of IQX devices is a non-blocking Switch Matrix. A
line in the Switch Matrix can be connected to one or more other
lines. The Switch Matrix lines are connected to I/O Ports with
programmable functional attributes.
The RapidConfigure parallel interface allows connections in the
Switch Matrix to be changed quickly and incrementally. This
interface can also be used to configure I/O Port attributes
individually and incrementally. In either case, data integrity is
maintained on all unchanged signal paths through the device.
The IQX devices support the industry standard JTAG (IEEE
1149.1) interface for boundary scan testing. The same interface
can also used for serially downloading the configuration bit
stream into the devices.
taSShared with
aI/O Control
Signals
I/O Port
I/O Port
.DI/O Port
I/O Port
www omShared with
.cRapidConfigure
t4UInterface Signals
I/O Port
I/O Port
I/O Port
Dedicated
I/O Control Signals
I/O
Control
Signal
Ports
Switch Matrix
[Crossbar Array]
RapidConfigure
Interface
JTAG Configuration Control
heeTDO TDI TMS TCK TRST*
taSFigure 1. IQX Functional Block Diagram
www.DaJune 2000
Revision 5.0
1




IQX240B pdf, 반도체, 판매, 대치품
Contents
5.6 AC Electrical Specifications for IQX160 and IQX128B..............................................................33
5.7 Parameter De-rating For One-to-Many Connections....................................................................35
5.8 Test Circuit and Timing Diagrams ...............................................................................................36
6.0 Pinout ..................................................................................................................................................43
6.1 IQX320 [PBGA/416L] Package Pinout by Name ........................................................................43
6.2 IQX320 [PBGA/416L] Package Pinout by Location ...................................................................44
6.3 IQX320 [PBGA/416L] Package Footprint ...................................................................................45
6.4 IQX240B [PQFP/304L] Package Pinout by Name.......................................................................46
6.5 IQX240B [PQFP/304L] Package Pinout by Location ..................................................................47
6.6 IQX240B [PQFP/304L] Package Pinout ......................................................................................48
6.7 IQX160 [PQFP/208L] Package Pinout by Name .........................................................................49
6.8 IQX160 [PQFP/208L] Package Pinout by Location ....................................................................50
6.9 IQX160 [PQFP/208L] Package Pinout.........................................................................................51
6.10 IQX128B [PQFP/184L] Package Pinout by Name.....................................................................52
6.11 IQX128B [PQFP/184L] Package Pinout by Location ................................................................53
6.12 IQX128B [PQFP/184L] Package Pinout ....................................................................................54
7.0 Mechanical Specification....................................................................................................................55
7.1 IQX320 [PBGA/416L] Package Dimensions ...............................................................................55
7.2 PQFP Package Dimensions .........................................................................................................56
8.0 Package Thermal Characteristics........................................................................................................57
9.0 Tables for Determining Die Pad to I/O Port Pin Mapping and Locations of Real SRAM Cell ....... 58
10.0 Component Availability and Ordering Information .........................................................................62
11.0 IQX Family at a Glance ....................................................................................................................63
12.0 Product Status Definitions ................................................................................................................64
4
Revision 5.0
June 2000

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IQX240B 전자부품, 판매, 대치품
Tables
Table 1. Summary of Programmable I/O Attributes for IQX Devices .....................................................11
Table 2. RapidConfigure Interface Pin Count ..........................................................................................16
Table 3. RapidConfigure Options .............................................................................................................16
Table 4. Changing Switch Matrix Connections Using RapidConfigure ..................................................17
Table 5. Configuring I/O Ports Using RapidConfigure Interface.............................................................18
Table 6. I/O Port Configuration Bits ........................................................................................................19
Table 7. I/O Configuration Register Contents ..........................................................................................21
Table 8. RapidConfigure Reset Commands .............................................................................................22
Table 9. Device Reset ...............................................................................................................................23
Table 10. Mode Control Register Bit Assignment ...................................................................................24
Table 11. Number of JTAG Cycles and Configuration Time (using a 10 MHz JTAG Clock) ................26
Table 12. IQX Pin Summary ...................................................................................................................27
Table 13. Supply Voltage Source .............................................................................................................28
Table 14. Absolute Maximum Ratings .....................................................................................................29
Table 15. Recommended Operating Conditions.......................................................................................29
Table 16. Capacitance...............................................................................................................................29
Table 17. DC Electrical Specifications.....................................................................................................30
Table 18. AC Electrical Specifications for IQX320 and IQX240B..........................................................31
Table 19. AC Electrical Specifications for IQX160 and IQX128B..........................................................33
Table 20. Parameter De-rating For One-to-Many Connections................................................................35
Table 21. IQX320 [PBGA/416L] Package Pinout by Name ....................................................................43
Table 22. IQX320 [PBGA/416L] Package Pinout by Location ...............................................................44
Table 23. IQX240B [PQFP/304L] Package Pinout by Name ..................................................................46
Table 24. IQX240B [PQFP/304L] Package Pinout by Location..............................................................47
Table 25. IQX160 [PQFP/208L] Package Pinout by Name .....................................................................49
Table 26. IQX160 [PQFP/208L] Package Pinout by Location ................................................................50
Table 27. IQX128B [PQFP/184L] Package Pinout by Name ..................................................................52
Table 28. IQX128B [PQFP/184L] Package Pinout by Location..............................................................53
Table 29. PQFP Package Dimensions ......................................................................................................56
Table 30. Package Thermal Coefficients ..................................................................................................57
Table 31. IQX320 and IQX240B I/O Port Pin Mapping ..........................................................................59
Table 32. IQX160 and IQX128B I/O Port Pin Mapping ..........................................................................61
Table 33. Component Availability............................................................................................................62
Table 34. Ordering Information................................................................................................................62
Table 35. IQX Family at a Glance ............................................................................................................63
June 2000
Revision 5.0
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