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FAS366U PDF 데이터시트 : 부품 기능 및 핀배열

부품번호 FAS366U
기능 Fast Architecture SCSI Precossor
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FAS366U 데이터시트, 핀배열, 회로
U.com QLogic Corporation
.DataSFhaeestt4 ArchiteFcAtuSr3e6S6CUSI ProcessorData Sheet
wwwFeatures
mH Compliance with ANSI draft Fast–20 standard
oH Compliance with ANSI X3T10/855D SCSI–3
parallel interface (SPI) standard
.cH Compliance with ANSI SCSI configured
automatically (SCAM) protocol levels 1 and 2
H Sustained SCSI data transfer rates of up to:
Uh 40 Mbytes/sec synchronous (ultra and wide
t4SCSI)
h 14 Mbytes/sec asynchronous (wide SCSI)
eH Synchronous DMA timing; DMA speed of
50 Mbytes/sec
eH REQ and ACK programmable assertion and
deassertion control
H Support for hot plugging
H Target and initiator block transfer sequences
H Bus idle timer
H Split–bus architecture
H Pipelined command structure
H On–chip, single–ended SCSI transceivers
(48–mA drivers)
H Initiator and target roles
H Active negation
H 16–bit recommand counter
H Differential mode
H SCSI bus reset watchdog timer
taShDBBUS
www.Da Sheet4U.comPADBUS
www.Data53366–580–01 B
FIFO
COMMAND
RECOMMAND
COUNTER
TRANSFER
COUNT
SEL/RESEL
BUS ID
SEL/RESEL
TIMEOUT
SYNC PERIOD
SYNC OFFSET/
SYNC ASSERT/
SYNC DEASSERT
CLOCK
CONVERSION
CONFIGURATION
TEST (SCAM)
SEQUENCERS
BLOCK
REGISTERS
TRANSFER
COUNTER
INTERRUPT
STATUS
SEQUENCE
STEP
Figure 1. FAS366U Block Diagram
SCSI
DATA
PARITY (2)
DATA (16)
SCSI
CONTROL
FAS366U
1




FAS366U pdf, 반도체, 판매, 대치품
QLogic Corporation
DREQ
DACK
DBRD
DB15–0
DREQ
DACK
DBWR
DB15–0
Figure 2. DMA Read Cycle
Figure 3. DMA Write Cycle
4 FAS366U
53366–580–01 B

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FAS366U 전자부품, 판매, 대치품
QLogic Corporation
PIN 102
PIN 103
17.2 " 0.25
14.00
PIN 128
PIN 1
23.2 " 0.25
20.00
PIN 65
PIN 64
A
4_ TYP
0.18 " 0.05
2.8 TYP
3.4 MAX
INDEX MARK
PIN 38
PIN 39
0.8 " 0.15
1.6
REF
0.23 " 0.05
0.3
+ 0.1
–0.05
0.5 " 0.1
DETAIL A
NOTE:
ALL DIMENSIONS ARE IN MILLIMETERS.
Figure 6. FAS366U Mechanical Drawings
Electrical Characteristics
Table 1. Operating Conditions
Symbol
Description
Minimum Maximum
Unit
VDD Supply voltage
4.75 5.25 V
IDDa Supply current (static IDD)
TBD
mA
IDDb Supply current (dynamic IDD)
TBD
mA
TA Ambient temperature
0 70 oC
Table Notes
Conditions not within the operating conditions but within the absolute maximum stress ratings may cause the chip to
malfunction.
aStatic IDD is measured with no clocks running and all inputs forced to VDD, all outputs unloaded, and all
bidirectional pins configured as inputs.
bDynamic IDD is dependent on the application.
53366–580–01 B
FAS366U
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FAS366U

Fast Architecture SCSI Precossor

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