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PDF MC54HC165A Data sheet ( Hoja de datos )
| Número de pieza | MC54HC165A | |
| Descripción | 8-Bit Serial or Parallel-Input/Serial-Output Shift Register | |
| Fabricantes | Motorola Semiconductors | |
| Logotipo |  |
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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Product Preview
8-Bit Serial or Parallel-Input/
Serial-Output Shift Register
High–Performance Silicon–Gate CMOS
The MC54/74HC165A is identical in pinout to the LS165. The device
inputs are compatible with standard CMOS outputs; with pullup resistors,
they are compatible with LSTTL outputs.
This device is an 8–bit shift register with complementary outputs from the
last stage. Data may be loaded into the register either in parallel or in serial
form. When the Serial Shift/Parallel Load input is low, the data is loaded
asynchronously in parallel. When the Serial Shift/Parallel Load input is high,
the data is loaded serially on the rising edge of either Clock or Clock Inhibit
(see the Function Table).
The 2–input NOR clock may be used either by combining two independent
clock sources or by designating one of the clock inputs to act as a clock
inhibit.
• Output Drive Capability: 10 LSTTL Loads
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 2 to 6 V
• Low Input Current: 1 µA
• High Noise Immunity Characteristic of CMOS Devices
• In Compliance with the Requirements Defined by JEDEC Standard
No. 7A
• Chip Complexity: 286 FETs or 71.5 Equivalent Gates
LOGIC DIAGRAM
MC54/74HC165A
16
1
J SUFFIX
CERAMIC PACKAGE
CASE 620–10
16
1
16
1
16
1
N SUFFIX
PLASTIC PACKAGE
CASE 648–08
D SUFFIX
SOIC PACKAGE
CASE 751B–05
DT SUFFIX
TSSOP PACKAGE
CASE 948F–01
ORDERING INFORMATION
MC54HCXXXAJ
MC74HCXXXAN
MC74HCXXXAD
MC74HCXXXADT
Ceramic
Plastic
SOIC
TSSOP
PARALLEL
DATA
INPUTS
A 11
B 12
13
C
D 14
E3
F4
G5
SERIAL
DATA
INPUT
H6
SA 10
SERIAL SHIFT/ 1
PARALLEL LOAD
CLOCK 2
CLOCK INHIBIT 15
9 QH
7
QH
SERIAL
DATA
OUTPUTS
PIN 16 = VCC
PIN 8 = GND
PIN ASSIGNMENT
SERIAL SHIFT/
PARALLEL LOAD
1
CLOCK 2
16 VCC
15 CLOCK INHIBIT
E3
14 D
F4
13 C
G5
12 B
H6
11 A
QH 7
GND 8
10 SA
9 QH
FUNCTION TABLE
Serial Shift/
Parallel Load
L
H
H
H
H
H
H
Inputs
Clock
Clock Inhibit
XX
L
L
L
L
XH
HX
SA
X
L
H
L
H
X
X
Internal Stages Output
A–H
a…h
X
X
X
X
X
X
QA QB QH
abh
L QAn QGn
H QAn QGn
L QAn QGn
H QAn QGn
No Change
Operation
Asynchronous Parallel Load
Serial Shift via Clock
Serial Shift via Clock Inhibit
Inhibited Clock
H L LXX
No Change
No Clock
X = don’t care
QAn – QGn = Data shifted from the preceding stage
This document contains information on a product under development. Motorola reserves the right to change or
discontinue this product without notice.
10/95
© Motorola, Inc. 1995
1 REV 0
1 page  
MC54/74HC165A
PIN DESCRIPTIONS
INPUTS
A, B, C, D, E, F, G, H (Pins 11, 12, 13, 14, 3, 4, 5, 6)
Parallel Data inputs. Data on these inputs are asynchro-
nously entered in parallel into the internal flip–flops when the
Serial Shift/Parallel Load input is low.
SA (Pin 10)
Serial Data input. When the Serial Shift/Parallel Load input
is high, data on this pin is serially entered into the first stage
of the shift register with the rising edge of the Clock.
CONTROL INPUTS
Serial Shift/Parallel Load (Pin 1)
Data–entry control input. When a high level is applied to
this pin, data at the Serial Data input (SA) are shifted into the
register with the rising edge of the Clock. When a low level is
applied to this pin, data at the Parallel Data inputs are
asynchronously loaded into each of the eight internal stages.
Clock, Clock Inhibit (Pins 2, 15)
Clock inputs. These two clock inputs function identically.
Either may be used as an active–high clock inhibit. However,
to avoid double clocking, the inhibit input should go high only
while the clock input is high.
The shift register is completely static, allowing Clock rates
down to DC in a continuous or intermittent mode.
OUTPUTS
QH, QH (Pins 9, 7)
Complementary Shift Register outputs. These pins are the
noninverted and inverted outputs of the eighth stage of the
shift register.
High–Speed CMOS Logic Data
DL129 — Rev 6
5
MOTOROLA
5 Page | ||
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| PDF Descargar | [ Datasheet MC54HC165A.PDF ] | |
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