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PDF LM4921 Data sheet ( Hoja de datos )
| Número de pieza | LM4921 | |
| Descripción | Low Voltage I2S 16-Bit Stereo DAC with Stereo Headphone Power Amplifiers and Volume Control | |
| Fabricantes | National Semiconductor | |
| Logotipo |  |
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November 2004
LM4921
Low Voltage I2S 16-Bit Stereo DAC with Stereo
Headphone Power Amplifiers and Volume Control
General Description
The LM4921 combines a 16-bit resolution stereo I2S input
digital-to-analog converter (DAC) with a stereo headphone
audio power amplifier. It is primarily designed for demanding
applications in mobile phones and other portable communi-
cation device applications. The LM4921 features an I2S
serial interface for the digital audio information and a 16-bit
SPI serial interface for internal register control and commu-
nication. With AVDD and DVDD = 3.0VDC and driving a 32Ω
single-ended load to a 26mWRMS output level the distortion
(THD+N) of the LM4921 will be less than 0.5%. The LM4921
also features a programmable 32-step digital volume control
accessed through an SPI interface.
Boomer audio power amplifiers were designed specifically to
provide high quality output power with a minimal amount of
external components. It is, therefore, ideally suited for mo-
bile phone and other low voltage applications where minimal
power consumption is a primary requirement.
The LM4921 features a low-power consumption shutdown
mode, and also has an internal thermal shutdown protection
mechanism.
Key Specifications
j PSRR at 217Hz, A/DVDD = 3V, (Fig. 1)
j POUT at AVDD = 3.0V, 32Ω
< 0.05% THD
< 0.5% THD
j Supply voltage range
DVDD
AVDD (Note 8)
j Shutdown current
52dB (typ)
13mW (typ)
26mW (typ)
2.6V to 5.0V
2.6V to 5.5V
1µA (typ)
Features
n 16-bit resolution stereo DAC
n I2S digital audio data serial interface
n SPI serial interface (control register)
n Volume Control (32 steps; 1.5 dB increments)
n Up to 50mW/channel stereo headphone amplifier
n Zero Crossing Detection for Silent Attenuation Steps
n 2.6VDC to 5.0VDC digital supply voltage range
n 2.6VDC to 5.5VDC analog supply voltage range (Note 8)
n Unity-gain stable headphone amplifiers
n Available in the 20-bump microSMD package
Applications
n Mobile phones
n PDAs
n Portable electronic devices
Boomer® is a registered trademark of National Semiconductor Corporation.
© 2004 National Semiconductor Corporation DS200486
www.national.com
1 page  
Absolute Maximum Ratings (Notes 1, 2)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage
Storage Temperature
Input Voltage
Power Dissipation (Note 3)
ESD Susceptibility
Human body model (Note 4)
Machine model (Note 5)
6.0V
−65˚C to +150˚C
-0.3V to VDD + 0.3V
Internally Limited
2000V
200V
Junction Temperature
Thermal Resistance
θJA
Operating Ratings
Temperature Range
TMIN ≤ TA ≤ TMAX
Supply Voltage
DVDD
AVDD
150˚C
60˚C/W
−40˚C ≤ TA ≤ 85˚C
2.6V ≤ DVDD ≤ 5.0V
2.6V ≤ AVDD ≤ 5.5V
Electrical Characteristics DVDD = 3.0V, AVDD = 5.0V, RL = 32Ω (Notes 1, 2)
The following specifications apply for the circuit shown in Figure 1 unless otherwise specified. Limits apply for TA = 25˚C.
Symbol
Parameter
Conditions
DVDD
AVDD
DIDD
AIDD
ISD
ISB
VFS
THD+N
PO
PSRR
SNR
DR
∆ACH-CH
XTALK
Digital Power Supply Voltage
Note 8
Analog Power Supply Voltage
Note 8
Digital Power Supply Quiescent
Current
RLoad = ∞, fMLCK = 11.2896MHz
Analog Power Supply Quiescent
Current
RLoad = ∞, fMCLK = 0MHz
Total Shutdown Power Supply
SHUTDOWN SPI bits 1 & 2 set to
Current
Standby Current
logic 0,
SPI, MCLK and I2S inputs at GND
Analog and Digital together
All clocks off
Full-Scale Output Voltage
Gain set at max
Total Harmonic Distortion + Noise fIN = 1kHz, POUT = 12mW
(Vol Control = 11111, I2S input adj
to get 12mW at output)
Headphone Amplifier Output Power
Power Supply Rejection Ratio
Signal-to-Noise Ratio
Dynamic Range
THD = (0.5%), fOUT = 1kHz
AVDD CBYPASS = 2.0µF
VRIPPLE = 200mVP-P 217Hz
fIN = 1kHz sinewave at -60dBFS,
A-weighted-fCONV = 44.1kHz
fIN = 1kHz sinewave at -60dBFS,
A-weighted
Channel-to-Channel Gain Mismatch fIN = 1kHz
Channel-to-Channel Crosstalk
fCONV = 44.1kHz,
fIN = 1kHz sinewave at -3dBFS
Volume Control Range
Minimum Attenuation
Maximum Attenuation
Volume Control Control Step Size
Mute Attenuation
LM4921
Typical
Limit
(Note 6) (Notes 7, 9)
3.0
5.0
3.5 7.5
Units
(Limits)
V
V
mA (max)
6 10 mA (max)
1
25
3.5
0.03
50
62
82
84
0.06
72
+3.0
-43.5
1.5
-102
5 uA(max)
uA
VP-P
%
40 mW (min)
45 dB (min)
dB
dB
dB
dB
dB
dB
dB
dB
5 www.national.com
5 Page 
Application Information
SPI OPERATIONAL DESCRIPTION
The serial data bits are organized into a field which contains 16 bits of data defined by TABLE 1. Bits 1 & 2 determine the output
mode of the LM4921 as shown in TABLE 2. Bits 7 through 11 determine the volume level setting as illustrated by TABLE 3. Bit
12 sets the Bypass capacitor charging time.
BIT #
0 (LSB)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15 (MSB)
Default Val
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Table 1. Bit Allocation
Function
RESET_B
MODE CONTROL
MASTER/SLAVE
RESOLUTION
RESERVED
ZERO CROSSING SET
VOLUME CONTROL
BYP CHARGE RATE
RESERVED
RESERVED
RESERVED
Description
RESET_B = 0, Resets the DAC
Must be high for the part to run.
See Table 2
0 = SLAVE, 1 = MASTER
0 = 16 bit, 1 = 32 bit
Should always be set to ’1’
0 = ZXD ENABLE, 1 = ZXD
DISABLE
See Table 3 - Volume Control
Settings
0 = 1X, 1 = 2X
Should always be set to ’0’
MODE CONTROL
Sets the modes as outlined in Table 2.
Output Mode #
0
1
2
3
Table 2. Output Mode Selection (Bits 1 & 2 above)
BIT 2
0
0
1
1
BIT 1
0
1
0
1
MODE
SD
STANDBY
MUTE
ACTIVE
Shutdown turns off the part completely for maximum power savings. The Standby mode turns off the clock but still consumes
more power than the shutdown mode. However, coming out of standby mode allows the part to turn back on faster than from
shutdown. In Mute mode the clocks remain on which uses more power but allows faster recovery and the ability to supply clock
signals to other devices which is important when the part is used in master mode. Active mode turns the part on for normal
operation.
MASTER/SLAVE SELECT
Allows the part to act as a master and supply the clock for
the rest of the system or be a slave to the system clock.
RESOLUTION SET
Sets the resolution to be either 16 or 32 bits of stereo audio
information. For most applications this will be set at 16 bits.
ZERO CROSSING DETECT SET
This pin turns on the zero crossing detection circuit. With this
circuit enabled the part will not allow a volume step change,
or shutdown mode, or standby mode to occur until the audio
input signal passes through zero. This pin should be set to
on for most applications.
11 www.national.com
11 Page | ||
| Páginas | Total 18 Páginas | |
| PDF Descargar | [ Datasheet LM4921.PDF ] | |
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