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NQ80220 데이터시트 PDF




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부품번호 NQ80220 기능
기능 (NQ80220 / NQ80221) Ethernet Media Interface Adapter
제조업체 LSI Logic Corporation
로고 LSI Logic Corporation 로고


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NQ80220 데이터시트, 핀배열, 회로
et4U.com 100BASE-MTeXd/1ia08BIn0AteS2rEf2a8-c00Te2/E82A0t0hd/8ea20rp22nt2ee11rt98184
taSheFeatures
s Single Chip 100Base-TX / 10Base-T Physical Layer
aSolution
.Ds Dual Speed - 100/10 Mbps
wws Half And Full Duplex
w s MII Interface To Ethernet Controller
ms MI Interface For Configuration & Status
os Optional Repeater Interface
.cs AutoNegotiation: 10/100, Full/Half Duplex
s Meets All Applicable IEEE 802.3, 10Base-T,
100Base-TX Standards
Us On Chip Wave Shaping - No External Filters
t4Required
s Adaptive Equalizer
es Baseline Wander Correction
es Interface to External 100Base-T4 PHY
s LED Outputs
h- Link
- Activity
S- Collision
- Full Duplex
ta- 10/100
- User Programmable
as Many User Features And Options
s Few External Components
.Ds Pin configuration
- 44L PLCC - 80220
www .com- 64L LQFP - 80221
Note: Check for latest Data Sheet revision
before starting any designs.
SEEQ Data Sheets are now on the Web, at
www.lsilogic.com.
This document is an LSI Logic document. Any
reference to SEEQ Technology should be
considered LSI Logic.
Description
The 80220/80221 are highly integrated analog interface
IC's for twisted pair Ethernet applications. The 80220/
80221 can be configured for either 100 Mbps (100Base-
TX) or 10 Mbps (10Base-T) Ethernet operation. The
80220 is packaged in a 44L package, while the 80221 is
packaged in a 64L package and contains a few more
features.
The 80220/80221 consist of 4B5B/Manchester encoder/
decoder, scrambler/descrambler, 100Base-TX/10Base-T
twisted pair transmitter with wave shaping and output
driver, 100Base-TX/10Base-T twisted pair receiver with
on chip equalizer and baseline wander correction, clock
and data recovery, AutoNegotiation, controller interface
(MII), and serial port (MI).
The addition of internal output waveshaping circuitry and
on-chip filters eliminates the need for external filters nor-
mally required in 100Base-TX and 10Base-T applications.
The 80220/80221 can automatically configure itself for
100 or 10 Mbps and Full or Half Duplex operation with the
on-chip AutoNegotiation algorithm.
The 80220/80221 can access eleven 16-bit registers though
the Management Interface (MI) serial port. These registers
contain configuration inputs, status outputs, and device
capabilities.
The 80220/80221 are ideal as media interfaces for
100Base-TX/10Base-T adapter cards, motherboards, re-
peaters, switching hubs, and external PHY's.
www.DataSheet4U4-11
MD400159/E




NQ80220 pdf, 반도체, 판매, 대치품
80220/80221
80220 / 80221 TABLE OF CONTENTS continued
3.18 Loopback
3.18.1 Internal CRS Loopback
3.18.2 Diagnostic Loopback
3.19 Automatic JAM
3.19.1 100 Mbps
3.19.2 10 Mbps
3.20 Reset
3.21 Powerdown
3.22 Oscillator
3.23 LED Drivers
3.24 100Base-T4 Interface
3.25 Repeater Mode
3.26 MI Serial Port
3.26.1 Signal Description
3.26.2 Timing
3.26.3 Multiple Register Access
3.26.4 Bit Types
3.26.5 Frame Structure
3.26.6 Register Structure
3.26.7 Interrupt
4.0 Register Description
5.0 Application Information
5.1 Example Schematics
5.2 TP Transmit Interface
5.3 TP Receive Interface
5.4 TP Transmit Output Current Set
5.5 Cable Selection
5.6 Transmitter Droop
5.7 MII Controller Interface
5.7.1 General
5.7.2 Clocks
5.7.3 Output Drive
5.7.4 MII Disable
5.7.5 Receive Output Enable
5.8 FBI Controller Interface
5.9 Repeater Applications
5.9.1 MII Based Repeaters
5.9.2 Non-MII Based Repeaters
5.9.3 Clocks
5.10 Serial Port
5.10.1 General
5.10.2 Polling vs. Interrupt
5.10.3 Multiple Register Access
5.10.4 Serial Port Addressing
5.11 Long Cable
5.12 Automatic JAM
5.13 Oscillator
5.14 Programmable LED Drivers
5.15 Power Supply Decoupling
6.0 Specifications
7.0 Ordering Information
7.1 44 Pin PLCC
7.2 64 Pin LQFP
8.0 Package Diagrams
8.1 44 Pin PLCC
8.2 64 Pin LQFP
9.0 Addendum
MD400159/E
4

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NQ80220 전자부품, 판매, 대치품
80220/80221
Pin Description continued
Pin# Pin
44L 64L Name
I/O Description
5 61 PLED0
(MDA0)
I/O
Pullup
Programmable LED Output/Management Interface Address Input. The default
function of this pin is to be a 10 Mbps Link Detect output. This pin can also be
programmed through the MI serial port to indicate other events or be user controlled.
This pin can drive an LED from both VCC and GND.
When programmed as 10 Mbps Link Detect Output (default):
1 = No Detect
0 = 10 Mbps Link Detected
During powerup or reset, this pin is high impedance and the value on this pin is latched
in as the address MDA0 for the MI serial port.
38 45 TRFADJ1 I Twisted Pair Output Rise/Fall Time adjust Input. These digital inputs adjust the
39 46 TRFADJ0 Pullup rise/fall time on the TPO± outputs.
Pulldown
11 = Rise/Fall Time Changed -0.25 nS
10 = Rise/Fall Time Changed in MI Serial Port (Default = 0.0 nS)
01 = Rise/Fall Time Changed +0.25 nS
00 = Rise/Fall Time Changed +0.50 nS
26 27 RX_EN/
JAM
I Receive Enable Input
1 = All Outputs Enabled
0 = Receive Controller Outputs are High Impedance
(RX_CLK, RXD[3:0], RX_DV, RX_ER, COL).
I Automatic Jam Input
1 = Normal
0 = Jam Packet Transmitted when Receive Activity Detected
— 63 PLED5
O Receive LED Output. The function of this pin is to be a Receive
O.D. Activity Detect output and this pin can drive an LED from VCC.
Pullup
— 2 PLED4
O
O.D.
Pullup
1 = No Receive Activity
0 = Receive Packet Occurred, Hold Low for 100 mS
Transmit LED Output. The function of this pin is to be a Transmit
Activity Detect output and this pin can drive an LED from VCC.
— 30 T4ADV
— 29 T4OE
— 24 RPTR
1 = No Transmit Activity
0 = Transmit Packet Occurred, Hold Low for 100 mS
I 100Base-T4 AutoNegotiation Advertise Input. This input causes the AutoNegotiation
Pulldown algorithm to advertise 100Base-T4 as one of the operating modes.
1 = Advertise 100Base-T4 Capability During AutoNegotiation
0 = No Advertise
O 100Base-T4 Output Enable. This output indicates that the AutoNegotiation algorithm
has selected 100Base-T4 as the operating mode and can be used to enable and external
100Base-T4 PHY. When asserted, the TP outputs are high impedance.
I Repeater Mode Enable Input.
Pulldown 1 = Repeater Mode Enabled
0 = Normal Operation
MD400159/E
4-77

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관련 데이터시트

부품번호상세설명 및 기능제조사
NQ80220

(NQ80220 / NQ80221) Ethernet Media Interface Adapter

LSI Logic Corporation
LSI Logic Corporation
NQ80221

(NQ80220 / NQ80221) Ethernet Media Interface Adapter

LSI Logic Corporation
LSI Logic Corporation

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