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부품번호 | AT89S8253 기능 |
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기능 | 8-Bit Microcontroller | ||
제조업체 | ATMEL Corporation | ||
로고 | |||
전체 30 페이지수
Features
• Compatible with MCS®51 Products
• 12K Bytes of In-System Programmable (ISP) Flash Program Memory
– SPI Serial Interface for Program Downloading
– Endurance: 10,000 Write/Erase Cycles
• 2K Bytes EEPROM Data Memory
– Endurance: 100,000 Write/Erase Cycles
• 64-byte User Signature Array
• 2.7V to 5.5V Operating Range
• Fully Static Operation: 0 Hz to 24 MHz (in x1 and x2 Modes)
• Three-level Program Memory Lock
• 256 x 8-bit Internal RAM
• 32 Programmable I/O Lines
• Three 16-bit Timer/Counters
• Nine Interrupt Sources
• Enhanced UART Serial Port with Framing Error Detection and Automatic
Address Recognition
• Enhanced SPI (Double Write/Read Buffered) Serial Interface
• Low-power Idle and Power-down Modes
• Interrupt Recovery from Power-down Mode
• Programmable Watchdog Timer
• Dual Data Pointer
• Power-off Flag
• Flexible ISP Programming (Byte and Page Modes)
– Page Mode: 64 Bytes/Page for Code Memory, 32 Bytes/Page for Data Memory
• Four-level Enhanced Interrupt Controller
• Programmable and Fuseable x2 Clock Option
• Internal Power-on Reset
• 42-pin PDIP Package Option for Reduced EMC Emission
• Green (Pb/Halide-free) Packaging Option
8-bit
Microcontroller
with 12 Kbyte
Flash
AT89S8253
1. Description
The AT89S8253 is a low-power, high-performance CMOS 8-bit microcontroller with
12K bytes of In-System Programmable (ISP) Flash program memory and 2K bytes of
EEPROM data memory. The device is manufactured using Atmel’s high-density non-
volatile memory technology and is compatible with the industry-standard MCS-51
instruction set and pinout. The on-chip downloadable Flash allows the program mem-
ory to be reprogrammed in-system through an SPI serial interface or by a
conventional nonvolatile memory programmer. By combining a versatile 8-bit CPU
with downloadable Flash on a monolithic chip, the Atmel AT89S8253 is a powerful
microcontroller which provides a highly-flexible and cost-effective solution to many
embedded control applications.
3286P–MICRO–3/10
3.5 PWRGND
3.6 Port 0
3.7 Port 1
3.8 Port 2
Ground for the 42-PDIP which connects only the I/O Pad Drivers. PWRGND and GND are
weakly connected through the common silicon substrate, but not through any metal links. The
application board must connect both GND and PWRGND to the board ground.
Port 0 is an 8-bit open drain bi-directional I/O port. As an output port, each pin can sink six TTL
inputs. When 1s are written to port 0 pins, the pins can be used as high-impedance inputs.
Port 0 can also be configured to be the multiplexed low-order address/data bus during accesses
to external program and data memory. In this mode, P0 has internal pull-ups.
Port 0 also receives the code bytes during Flash programming and outputs the code bytes dur-
ing program verification. External pull-ups are required during program verification.
Port 1 is an 8-bit bi-directional I/O port with internal pull-ups. The Port 1 output buffers can
sink/source six TTL inputs. When 1s are written to Port 1 pins, they are pulled high by the weak
internal pull-ups and can be used as inputs. As inputs, Port 1 pins that are externally being
pulled low will source current (IIL,150 µA typical) because of the weak internal pull-ups.
Some Port 1 pins provide additional functions. P1.0 and P1.1 can be configured to be the
timer/counter 2 external count input (P1.0/T2) and the timer/counter 2 trigger input (P1.1/T2EX),
respectively. Furthermore, P1.4, P1.5, P1.6, and P1.7 can be configured as the SPI slave port
select, data input/output and shift clock input/output pins as shown in the following table.
Port Pin
P1.0
P1.1
P1.4
P1.5
P1.6
P1.7
Alternate Functions
T2 (external count input to Timer/Counter 2), clock-out
T2EX (Timer/Counter 2 capture/reload trigger and direction control)
SS (Slave port select input)
MOSI (Master data output, slave data input pin for SPI channel)
MISO (Master data input, slave data output pin for SPI channel)
SCK (Master clock output, slave clock input pin for SPI channel)
Port 1 also receives the low-order address bytes during Flash programming and verification.
Port 2 is an 8-bit bi-directional I/O port with internal pull-ups. The Port 2 output buffers can
sink/source six TTL inputs. When 1s are written to Port 2 pins, they are pulled high by the weak
internal pull-ups and can be used as inputs. As inputs, Port 2 pins that are externally being
pulled low will source current (IIL,150 µA typical) because of the weak internal pull-ups.
Port 2 emits the high-order address byte during fetches from external program memory and dur-
ing accesses to external data memory that use 16-bit addresses (MOVX @ DPTR). In this
application, Port 2 uses strong internal pull-ups when emitting 1s. During accesses to external
data memory that use 8-bit addresses (MOVX @ RI), Port 2 emits the contents of the P2
Special Function Register.
Port 2 also receives the high-order address bits and some control signals during Flash
programming and verification.
4 AT89S8253
3286P–MICRO–3/10
4페이지 AT89S8253
5. Special Function Registers
A map of the on-chip memory area called the Special Function Register (SFR) space is shown in
Table 5-1.
Note that not all of the addresses are occupied, and unoccupied addresses may not be imple-
mented on the chip. Read accesses to these addresses will generally return random data, and
write accesses will have an indeterminate effect.
User software should not write 1s to these unlisted locations, since they may be used in future
products to invoke new features. In that case, the reset or inactive values of the new bits will
always be 0.
Table 5-1. AT89S8253 SFR Map and Reset Values
0F8H
0F0H
B
00000000
0E8H
0E0H
ACC
00000000
0D8H
0D0H
0C8H
PSW
00000000
T2CON
00000000
T2MOD
XXXXXX00
RCAP2L
00000000
RCAP2H
00000000
TL2
00000000
0C0H
0B8H
IP
XX000000
SADEN
00000000
0B0H
P3
11111111
0A8H
IE
0X000000
SADDR
00000000
SPSR
000XXX00
0A0H
P2
11111111
98H
SCON
00000000
SBUF
XXXXXXXX
90H
P1
11111111
88H
TCON
00000000
TMOD
00000000
TL0
00000000
TL1
00000000
TH0
00000000
80H
P0
11111111
SP
00000111
DP0L
00000000
DP0H
00000000
DP1L
00000000
Note: # means: 0 after cold reset and unchanged after warm reset.
SPCR
00000100
TH2
00000000
TH1
00000000
DP1H
00000000
0FFH
0F7H
0EFH
0E7H
0DFH
0D7H
0CFH
0C7H
WDTRST
(Write Only)
EECON
XX000011
AUXR
XXXXXXX0
SPDR
########
0BFH
IPH
XX000000
0B7H
0AFH
WDTCON
0000 0000
0A7H
9FH
97H
CLKREG
XXXXXXX0
PCON
00XX0000
8FH
87H
3286P–MICRO–3/10
7
7페이지 | |||
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부품번호 | 상세설명 및 기능 | 제조사 |
AT89S8252 | 8-Bit Microcontroller with 8K Bytes Flash | ATMEL Corporation |
AT89S8252-16AA | 8-Bit Microcontroller with 8K Bytes Flash | ATMEL Corporation |
DataSheet.kr | 2020 | 연락처 | 링크모음 | 검색 | 사이트맵 |