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KM23V32000D 데이터시트 PDF




Samsung Semiconductor에서 제조한 전자 부품 KM23V32000D은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


PDF 형식의 KM23V32000D 자료 제공

부품번호 KM23V32000D 기능
기능 (KM23x32000xTY) 32M-Bit CMOS Mask ROM
제조업체 Samsung Semiconductor
로고 Samsung Semiconductor 로고


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KM23V32000D 데이터시트, 핀배열, 회로
KM23V32000D(E)TY/KM23S32000D(E)TY
CMOS MASK ROM
32M-Bit (4Mx8 /2Mx16) CMOS MASK ROM
FEATURES
GENERAL DESCRIPTION
Switchable organization
The KM23V32000D(E)TY and KM23S32000D(E)TY are fully
4,194,304x8(byte mode)
static mask programmable ROM fabricated using silicon gate
2,097,152x16(word mode)
CMOS process technology, and is organized either as
Fast access time
4,194,304 x8 bit(byte mode) or as 2,097,152x16 bit(word
Random Access Time
3.3V/3.0V Operation : 100ns(Max.)
2.5V Operation : 150ns(Max.)
mode) depending on BHE voltage level.(See mode selection
table)
Supply voltage
This device operates with low power supply, and all inputs and
KM23V32000D(E)TY : single +3.0V/ single +3.3V
KM23S32000D(E)TY : single +2.5V
Current consumption
mOperating : 40mA(Max.)
Standby : 30µA(Max.)
oFully static operation
All inputs and outputs TTL compatible
.cThree state outputs
Package
-. KM23V(S)32000D(E)TY : 48-TSOP1-1218
outputs are TTL compatible.
Because of its asynchronous operation, it requires no external
clock assuring extremely easy operation.
It is suitable for use in program memory of microprocessor, and
data memory, character generator.
The KM23V32000D(E)TY and KM23S32000D(E)TY are pack-
aged in a 48-TSOP1.
t4UFUNCTIONAL BLOCK DIAGRAM
heeA20
S.
.
ta.
.
.
a.
.
.
.DA0
A-1
wwCE
mOE
w www.DataSheet4U.coBHE
X
BUFFERS
AND
DECODER
Y
BUFFERS
AND
DECODER
CONTROL
LOGIC
MEMORY CELL
MATRIX
(2,097,152x16/
4,194,304x8)
SENSE AMP.
DATA OUT
BUFFERS
...
Q0/Q8 Q7/Q15
Pin Name
A0 - A20
Q0 - Q14
Q15 /A-1
BHE
CE
OE
VCC
VSS
Pin Function
Address Inputs
Data Outputs
Output 15(Word mode)/
LSB Address(Byte mode)
Word/Byte selection
Chip Enable
Output Enable
Power
Ground




KM23V32000D pdf, 반도체, 판매, 대치품
KM23V32000D(E)TY/KM23S32000D(E)TY
CMOS MASK ROM
AC CHARACTERISTICS(VCC=3.3V/3.0V±0.3V, VCC=2.5V±0.2V, unless otherwise noted.)
TEST CONDITIONS
Item
Input Pulse Levels
Input Rise and Fall Times
Input and Output timing Levels
Output Loads
Value
0.45V to 2.4V(at VCC=3.3V/3.0V)
0.4V to 2.2V (at VCC=2.5V)
10ns
1.5V (at VCC=3.3V/3.0V)
1.1V (at VCC=2.5V)
1 TTL Gate and CL=100pF
READ CYCLE
Item
Read Cycle Time
Chip Enable Access Time
Address Access Time
Output Enable Access Time
Output or Chip Disable to
Output High-Z
Output Hold from Address Change
Symbol
tRC
tACE
tAA
tOE
tDF
tOH
VCC=3.3V/3.0V±0.3V
Min Max
100
100
100
50
20
0
VCC=2.5V±0.2V
Min Max
150
150
150
70
30
0
Unit
ns
ns
ns
ns
ns
ns
TIMING DIAGRAM
READ
ADD
A0~A20
A-1(*1)
CE
ADD1
tRC
tACE
ADD2
tDF(*3)
OE
DOUT
D0~D7
D8~D15(*2)
tOE tAA
VALID DATA
tOH
VALID DATA
NOTES :
*1. Byte Mode only. A-1 is Least Significant Bit Address.(BHE = VIL)
*2. Word Mode only.(BHE = VIH)
*3. tDF is defined as the time at which the outputs achieve the open circuit condition and is not referenced to VOH or VOL level.

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관련 데이터시트

부품번호상세설명 및 기능제조사
KM23V32000D

(KM23x32000xTY) 32M-Bit CMOS Mask ROM

Samsung Semiconductor
Samsung Semiconductor
KM23V32000DTY

(KM23x32000xTY) 32M-Bit CMOS Mask ROM

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