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PDF KS32C50100 Data sheet ( Hoja de datos )
| Número de pieza | KS32C50100 | |
| Descripción | 32-Bit Timers | |
| Fabricantes | Samsung | |
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KS32C50100 RISC MICROCONTROLLER
11 32-BIT TIMERS
32-BIT TIMERS
OVERVIEW
The KS32C50100 has two 32-bit timers. These timers can operate in interval mode or in toggle mode. The output
signals are TOUT0 and TOUT1, respectively.
You enable or disable the timers by setting control bits in the timer control register, TCON. An interrupt request is
mgenerated whenever a timer count-out (down count) occurs.
oINTERVAL MODE OPERATION
.cIn interval mode, a timer generates a one-shot pulse of a preset timer clock duration whenever a time-out occurs.
This pulse generates a time-out interrupt that is directly output at the timer's configured output pin (TOUTn). In this
Ucase, the timer frequency monitored at the TOUTn pin is calculated as:
t4fTOUT = fMCLK / Timer data value
eTOGGLE MODE OPERATION
eIn toggle mode, the timer pulse continues to toggle whenever a time-out occurs. An interrupt request is generated
whenever the level of the timer output signal is inverted (that is, when the level toggles). The toggle pulse is output
hdirectly at the configured output pin.
SUsing toggle mode, you can achieve a flexible timer clock range with 50% duty. In toggle mode, the timer frequency
tamonitored at the TOUTn pin is calculated as follows:
fTOUT = fMCLK / (2 * Timer data value)
w.DaINTERVAL MODE
wwTOGGLE MODE
f TOUT
Time-out
Time-out
f TOUT
Time-out
(INITIAL TOUTn IS 0)
www.DataSheet4U.comFigure 11-1 Timer Output Siganl Timing
11-1
1 page  
KS32C50100 RISC MICROCONTROLLER
32-BIT TIMERS
TIMER COUNT REGISTERS
The timer count registers, TCNT0 and TCNT1, contain the current timer 0 and 1 count value, respectively, during
normal operation.
Register
TCNT0
TCNT1
Table 11-3 TCNT0 and TCNT1 Registers
Offset Address R/W
Description
0x600C
R/W Timer 0 count register
0x6010
R/W Timer 1 count register
Reset Value
0xffffffff
0xffffffff
31
Timer Count
[31:0] Timer 0/1 count value
0
Figure 11-5 Timer Count Registers (TCNT0, TCNT1)
11-5
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