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PDF MC14024UB Data sheet ( Hoja de datos )

Número de pieza MC14024UB
Descripción 7-Stage Ripple Counter
Fabricantes Motorola Semiconductors 
Logotipo Motorola Semiconductors Logotipo



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No Preview Available ! MC14024UB Hoja de datos, Descripción, Manual

MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
MC14023B (see Page 6-5)
MC14023UB (see Page 6-14)
MC14024B
7-Stage Ripple Counter
The MC14024B is a 7–stage ripple counter with short propagation delays
and high maximum clock rates. The Reset input has standard noise
immunity, however the Clock input has increased noise immunity due to
Hysteresis. The output of each counter stage is buffered.
L SUFFIX
CERAMIC
CASE 632
Diode Protection on All Inputs
Output Transitions Occur on the Falling Edge of the Clock Pulse
P SUFFIX
PLASTIC
Supply Voltage Range = 3.0 Vdc to 18 Vdc
CASE 646
Capable of Driving Two Low–power TTL Loads or One Low–power
Schottky TTL Load Over the Rated Temperature Range
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ mPin–for–Pin Replacement for CD4024B
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ oMAXIMUM RATINGS* (Voltages Referenced to VSS)
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ .cSymbol
Parameter
Value
Unit
VDD DC Supply Voltage
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ UVin, Vout Input or Output Voltage (DC or Transient)
lin, lout Input or Output Current (DC or Transient),
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ t4perPin
– 0.5 to + 18.0
– 0.5 to VDD + 0.5
± 10
V
V
mA
PD Power Dissipation, per Package†
500 mW
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎeTstg Storage Temperature
– 65 to + 150
_C
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎeÎÎTL Lead Temperature(8–SecondSoldering)
260 _ C
ÎÎ* Maximum Ratings are those values beyond which damage to the device may occur.
h†Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/_ C From 65_ C To 125_ C
SCeramic “L” Packages: – 12 mW/_C From 100_C To 125_C
ata1
CLOCK
LOGIC DIAGRAM
CQ
CQ
CQ
CQ
w.D2
RESET
RQ
RQ
RQ
RQ
D SUFFIX
SOIC
CASE 751A
ORDERING INFORMATION
MC14XXXBCP
MC14XXXBCL
MC14XXXBD
Plastic
Ceramic
SOIC
TA = – 55° to 125°C for all packages.
PIN ASSIGNMENT
CLOCK
RESET
Q7
Q6
Q5
Q4
VSS
1
2
3
4
5
6
7
14 VDD
13 NC
12 Q1
11 Q2
10 NC
9 Q3
8 NC
VDD = PIN 14
VSS = PIN 7
NC = NO CONNECTION
ww .com12 11
UQ1 Q2
43
Q6 Q7
t4Q3 = PIN 9
eQ4 = PIN 6
eQ5 = PIN 5
w.DataShREV 3
1/94
ww©MMCot1or4o0la2, I4nBc. 1995
MOTOROLA CMOS LOGIC DATA
100

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MC14024UB pdf
MC14024B
104
Figure 4. Functional Waveforms
MOTOROLA CMOS LOGIC DATA

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