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SH66P22A 데이터시트 PDF




Sino Wealth Microelectronic에서 제조한 전자 부품 SH66P22A은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


PDF 형식의 SH66P22A 자료 제공

부품번호 SH66P22A 기능
기능 OTP 4-Bit Microcontroller
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로고 Sino Wealth Microelectronic 로고


SH66P22A 데이터시트 를 다운로드하여 반도체의 전기적 특성과 매개변수에 대해 알아보세요.



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SH66P22A 데이터시트, 핀배열, 회로
SH66P22A
Features
SH6610C-based single-chip 4-bit micro-controller
OTPROM: 4K X 16 bits
RAM: 160 X 4 bits (data memory)
Operation voltage: 2.4V - 6.0V (typical 3.0V or 5.0V)
22 CMOS bi-directional I/O pins
4-level subroutine nesting (including interrupts)
One 8-bit auto re-load timer/counter
Warm-up timer for power on reset
Powerful interrupt sources:
- Internal interrupt (Timer0)
- External interrupts: PortB & PortC (falling edge)
OTP 4-bit Microcontroller
Oscillator (OTP option)
- X`tal oscillator:
32.768KHz - 4MHz
- Ceramic resonator: 400K - 4MHz
- RC oscillator :
400K - 4MHz
- External clock:
30K - 4MHz
Instruction cycle time:
- 4/32.768KHz(122us) for 32.768KHz OSC clock
- 4/4MHz (1us) for 4MHz OSC clock
Two low power operation modes: HALT and STOP
Built-in watch dog timer (OTP option)
Built-in power on reset
General Description
SH66P22A is a 4-bit micro controller. This chip integrates the SH6610C 4-bit CPU core with SRAM, 4K OTPROM, Timer and
I/O Ports.
Pin Configuration
PE2
PE3
PF1
PA2
PA3
T0
RESET
GND
PB0
PB1
PB2
PB3
PD0
PD1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28 PE1
27 PE0
26 PF0
25 PA1
24 PA0
23 OSCI
22 OSCO
21 VDD
20 PC3
19 PC2
18 PC1
17 PC0
16 PD3
15 PD2
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1 V2.4




SH66P22A pdf, 반도체, 판매, 대치품
SH66P22A
3. RAM
The built-in RAM consists of general-purpose data memory and the system register. Direct addressing in one instruction can
access both data memory and the system register.
The following is the memory allocation map:
$000 - $01F: System register and I/O.
$020 - $0BF: Data memory (160 X 4 bits, divided into 2 banks. $020 - $07F: bank0, $080 - $0BF: bank1).
The Configuration of the System Register
Address
Bit3
Bit2
Bit1
Bit0 R/W
Remarks
$00 - IET0 -
IEP R/W Interrupt enable flags
$01
- IRQT0 -
IRQP
R/W Interrupt request flags
$02
-
TM0.2
TM0.1
TM0.0 R/W Timer0 Mode register (Prescaler)
$03 - - - - - Reserved
$04
TL0.3
TL0.2
TL0.1
TL0.0 R/W Timer0 load/counter register low digit
$05
TH0.3
TH0.2
TH0.1
TH0.0 R/W Timer0 load/counter register high digit
$06 - - - - - Reserved
LPD Enable Control (LPD3 - 0):
$07
LPD3
LPD2
LPD1
LPD0
W 1010: LPD Enabled (Default);
0101: LPD Disabled
$08
PA.3
PA.2
PA.1
PA.0
R/W PORTA
$09
PB.3
PB.2
PB.1
PB.0
R/W PORTB
$0A
PC.3
PC.2
PC.1
PC.0
R/W PORTC
$0B
PD.3
PD.2
PD.1
PD.0
R/W PORTD
$0C
PE.3
PE.2
PE.1
PE.0
R/W PORTE
$0D -
-
PF.1
PF.0
R/W PORTF
$0E
TBR.3
TBR.2
TBR.1
TBR.0 R/W Table Branch Register
$0F
INX.3
INX.2
INX.1
INX.0
R/W Pseudo index register
$10
DPL.3
DPL.2
DPL.1
DPL.0 R/W Data pointer for INX low nibble
$11
-
DPM.2
DPM.1
DPM.0 R/W Data pointer for INX middle nibble
$12
DPH.2
DPH.1
DPH.0 R/W Data pointer for INX high nibble
$13 - $15
Reserved
$16 PA3OUT PA2OUT PA1OUT PA0OUT W Set PORTA as an output port
$17 PB3OUT PB2OUT PB1OUT PB0OUT W Set PORTB as an output port
$18 PC3OUT PC2OUT PC1OUT PC0OUT W Set PORTC as an output port
$19 PD3OUT PD2OUT PD1OUT PD0OUT W Set PORTD as an output port
$1A PE3OUT PE2OUT PE1OUT PE0OUT W Set PORTE as an output port
$1B -
$1C -
$1D -
- PF1OUT PF0OUT W Set PORTF as an output port
-
T0S
T0E
W
Bit0: T0 signal edge;
Bit1: T0 signal source
- - - - Reserved
$1E WDT
-
-
-
W
Bit3: Watchdog timer reset
(write 1 to reset WDT)
$1F - - - - - Reserved
* System Register $00 - $12 (except $07H) refer to "SH6610C User manual".
4

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SH66P22A 전자부품, 판매, 대치품
SH66P22A
T0
TOE
OSC/4
EOR
T0S
0
M
U
1X
Built-in RC
Oscillator
WDT Enable
(OTP option )
WDT reset
WDT & Warm
Up Counter
TIMER0 (8bits)
3
TM0 [2:0]
3
WDT Timeout
System Register $1E
Address Bit3 Bit2 Bit1 Bit0 R/W
Remark
$1E WDT - - - W Bit3: Watchdog timer reset. (write 1 to reset WDT)
The input clock of the watchdog timer is generated by a built-in RC oscillator so that the WDT will always run even in the STOP
mode. SH66P22A generates a RESET condition when the watchdog times-out. The watchdog can be enabled or disabled
permanently by using the OTP option. To prevent it timing out and generating a device RESET condition, you should write this
bit as "1" before timing-out. The WDT has a time-out period of more than 7ms.If longer time-out periods are desired, a prescaler
with a division ratio of up to 1:2048 can be assigned to the WDT under software controll by writing to the TM0 register.
Prescaler divide ratio:
TM0.2
1
1
1
1
0
0
0
0
TM0.1
1
1
0
0
1
1
0
0
TM0.0
1
0
1
0
1
0
1
0
Prescaler Divide Ratio
1:1
1:2
1:4
1:8
1:32
1:128
1:512
1:2048 (Power on initial)
Timer-out Period
7ms
14ms
28ms
56ms
224ms
896ms
3,584ms
14,336ms
RC OSC
2.25ms
Internal
SCALER_1
/8
WDT Time
out Period
18ms
/1 /2
WDT
PRESCALER TM0
/4 /8 /32 /128 /512 /2048
Final WDT
Time out
period
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관련 데이터시트

부품번호상세설명 및 기능제조사
SH66P22A

OTP 4-Bit Microcontroller

Sino Wealth
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SH66P22A

OTP 4-Bit Microcontroller

Sino Wealth Microelectronic
Sino Wealth Microelectronic

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