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Número de pieza | MK3805 | |
Descripción | Buffer/Clock Driver | |
Fabricantes | Integrated Circuit Systems | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de MK3805 (archivo pdf) en la parte inferior de esta página. Total 7 Páginas | ||
No Preview Available ! PRELIMINARY INFORMATION
MK3805
Buffer/Clock Driver
Description
The MK3805 is a non-inverting clock driver/buffer
providing two independent banks of four outputs each.
These buffers have a tri-state output enable input
(active low) with 1-input, 5-output configuration per
group. The skew between the outputs of the same
package is 0.5 ns and the skew between the outputs of
different packages is 0.8 ns. The maximum input to
output delay is 4.5 ns.
Features
• Packaged in 20 pin SSOP or 20 pin SOIC
• Five outputs for each bank with one clock input
• Two separate banks of five outputs each
• Advanced, low power, CMOS process
• Ten output clocks
• Two separate inputs
• Industrial temperature range -40°C to +85°C
• Hysteresis on all inputs
Block Diagram
OEA
INA
OEB
INB
VDD
2
3
GND
5 OA0-4
5 OB0-4
MON
www.DataSheet4U.com
MDS 3805 A
1
Revision 072203
Iwntwewgr.DataetdaSChireceuti4t US.ycsotmems, Inc. ● 525 Race Street, San Jose, CA 95126 ● tel (408) 295-9800 ● www.icst.com
1 page Preliminary Information
MK3805
Buffer/Clock Driver
AC Electrical Characteristics
Unless stated otherwise, VDD = 3.3V ±5%, Ambient Temperature -40°C to +85°C
Parameter
Symbol
Conditions
Min.
Skew between outputs of same
package)
tsk(o)
CL=50pF, RL=500Ω
Skew between outputs of
different packages at same
temp (same transition)
tsk(t)
CL=50pF, RL=500Ω
Propagation Delay INA to OAN
INB to OBN
tPLH,
tPHL
CL=50pF, RL=500Ω 1.5
Rise time of the output
0.8V to 2.0V
tR CL=50pF, RL=500Ω
Fall time of the output
2.0V to 0.8V
tF CL=50pF, RL=500Ω
Output Enable Time
OEA to OAN, CL=50pF, RL=500Ω
OEB to OBN
1.5
Output Disable Time
OEA to OAN, CL=50pF, RL=500Ω
OEB to OBN
1.5
Duty Cycle Measured at VDD/2
Operating Frequency
CL=50pF, RL=500Ω
CL=50pF, RL=500Ω
45
1
Typ. Max. Units
0.5 ns
0.8 ns
4.5 ns
2 ns
2 ns
6.2 ns
5.0 ns
55 %
100 MHz
MDS 3805 A
5
Revision 072203
Integrated Circuit Systems, Inc. ● 525 Race Street, San Jose, CA 95126 ● tel (408) 295-9800 ● www.icst.com
5 Page |
Páginas | Total 7 Páginas | |
PDF Descargar | [ Datasheet MK3805.PDF ] |
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