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EM6125 데이터시트 PDF




EM Microelectronic에서 제조한 전자 부품 EM6125은 전자 산업 및 응용 분야에서
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부품번호 EM6125 기능
기능 Digitally programmable 65 and 81 multiplex rate LCD Controller and Driver
제조업체 EM Microelectronic
로고 EM Microelectronic 로고


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EM6125 데이터시트, 핀배열, 회로
EM MICROELECTRONIC - MARIN SA
EM6125
Digitally programmable 65 and 81 multiplex rate LCD
Controller and Driver
Features
Slim IC for COG, COF and COB technologies
I2C & Serial bus interface
Internal display data RAM
2 digitally programmable multiplex rates :
- 81 rows x 102 columns
- 65 rows x 118 columns
LCD supply voltage internally generated and digitally
programmable from 3V to 11V
Low operating current consumption: 120µA (typ)
No external components needed except one VLCD
capacitor
On chip
- 4 intermediate bias voltages generation
- Oscillator for LCD refresh (no external components
required)
High noise immunity on inputs
Row and column drivers mirroring for COG or COF
connections flexibility
Partial display mode with 17 active rows for current
consumption reduction
Sleep mode for a nearly null current consumption
Wide VDD supply voltage from 1.8V to 5V.
Wide temperature range: -40°C to +85°C
Description
The EM6125 is a bit map controller and driver for full dot
matrix monochrome STN LCD displays. The driving
capability is 81 rows x 102 columns (10 rows of
characters + one row of icons) or 65 rows x 118 columns
(8 rows of characters + one row of icons). There is a one
to one relation between LCD pixels and bits of the
Display Data RAM.
The EM6125 is extremely low power consumption LCD
controller and driver product. The typical current
consumption is about 120µA with no external component
except the capacitor connected to VLCD. One important
feature on EM6125 is the partial display mode, which
enables important current consumption reduction. With
this function selected, only 17 rows remain active,
needed VLCD decreases and the commutation
frequencies of row and column drivers are also
decreased. These three effects of partial display mode
reduce drastically current consumption.
Typical Applications
Mobile phones
Smart cards
Automotive displays
Portable, battery operated products
Balances and scales, utility meters
Typical Operating Configuration
41 row drivers
40 row drivers
102 columns outputs
EM6125
VLCD SCL SDA RES Vss1 Vss2 VDD1 VDD2 VHV
Pin Configuration
Figure 1
Copyright 2001, EM Microelectronic-Marin SA
www.DataSheet4U.com
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Figure 2
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www.emmicroelectronic.com




EM6125 pdf, 반도체, 판매, 대치품
1 Absolute Maximum Rating s
Parameter
Supply voltage range
Supply voltage range
Supply voltage range
All input voltages
Voltages at S0 to S184
Storage temperature
range
Electrostatic discharge
max. to MIL-STD-883C
method 3015
Maximum soldering
conditions
Symbol
VDD1,2
VHV
VLCD
VLOGIC
VDISPLAY
TSTO
VESD
TSMAX
Conditions
-0.3V to +6V
-0.3V to +6V
VHV-0.3V to +12V
-0.3V to VDD1,2+0.3V
-0.3V to VLCD + 0.3V
-65°C to +150 °C
1000V
250°C× 10 s
Stresses above these listed maximum ratings may cause
permanent damage to the device. Exposure beyond
specified electrical characteristics may affect device
reliability or cause malfunction.
EM6125
2 Handling Procedures
This device has built-in protection against high static
voltages or electric fields; however, anti-static
precautions should be taken as for any other CMOS
components. Unless otherwise specified, proper
operation can only occur when all terminal voltages are
kept within the supply voltage range.
3 Operating Conditions
Parameter
Symbol Min. Typ. Max.
Operating
temperature
TA
-40
+85 °C
Logic supply
voltage
VDD1,2
1.8 2.5 5.5 V
High voltage
generator
VHV
2.4 * 2.5 5.5 V
supply voltage
LCD supply
voltage
VLCD
3 8 11 V
* Lower VHV voltage is possible until the required VLCD voltage is reached.
4 Electrical Characteristics
VSS1,2 = 0V, VDD1 = VDD2 = 1.8V, VHV = 2.4V, unless otherwise specified. TA = -40°C to +85 °C unless otherwise specified.
Minimum required capacitor: 1µF on VLCD, 100nF on VDD1,2 and VHV.
Parameter
Symbol
Test conditions
Min.
Typ.
Max. Units
Supply Current
Sleep mode
Sleep mode
Normal LCD refresh mode
Normal LCD refresh mode
Partial LCD refresh mode
Control Input Signals
IDD
IHV
IDD
IHV
IHV
Sleep = 1
Sleep = 1
(note 1)
(note 2)
(note 3)
10 nA
0.5 µA
15 21 µA
124 180 µA
50 87 µA
Input leakage
Input capacitance
Low level input voltage
High level input voltage
LCD Outputs
Internally generated LCD
supply voltage
IIN
Vi = Vss1 or VDD1
-1
1 µA
CIN 8 pF
VIL
0.3xVDD1
V
VIH
0.7xVDD1
V
VLCD 00000000b
3.02 V
VLCD 10001110b
8.02 V
VLCD step between 2
consecutive programmed
VLCD Level
V bias tolerance
VLCD step
V bias tol.
(note 5)
35.2 mV
-80 80 mV
Note 1: Measured on VDD1 + VDD2, all outputs open, SDA and SCL at VSS, RES at VDD1, multiplex rate 81, x5 voltage
multiplier, VLCD = 10001110b, DDRAM loaded with checker pattern
Note 2: Measured on VHV, same conditions as (note 1).
Note 3: Measured on VHV, all outputs open, SDA and SCL at VSS, RES at VDD1, partial display mode, × 2 voltage multiplier,
VLCD = 00101011b, DDRAM loaded with checker pattern.
Note 4: With internal voltage multiplier, the maximum VLCD voltage depends on VHV, programmed voltage multiplier and
display load.
Note 5: V1, V2, V3 and V4 bias levels measured with VLCD = 7V, on 1 LCD row driver output and 1 LCD column driver
output, multiplex rate 81, TA = 25 °C, load = ±10µA.
Copyright 2001, EM Microelectronic-Marin SA
4
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EM6125 전자부품, 판매, 대치품
5.1 Timing Waveforms
SDA
SCL
Data line
Change of
stable, data data allowed
valid
Figure 3: I2C 1 bit transfer
EM6125
SDA
SCL
S
Start condition
Figure 4: I2C start and stop conditions
P
Stop condition
SDA
By transmitter
SDA
By receiver
SCL
S
Start condition
Not Acknowledge
Acknowledge
12
89
Figure 5: Acknowledgement on the I2C bus
Clock pulse for
acknowledgement
Copyright 2001, EM Microelectronic-Marin SA
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