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C8051F326 데이터시트 PDF




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부품번호 C8051F326 기능
기능 (C8051F326 / C8051F327) Full Speed USB / 16k ISP FLASH MCU Family
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C8051F326 데이터시트, 핀배열, 회로
C8051F326/7
Full Speed USB, 16 kB Flash MCU Family
USB Function Controller
- USB specification 2.0 compliant
- Full speed (12 Mbps) or low speed (1.5 Mbps)
operation
- Integrated clock recovery; no external crystal
required for full speed or low speed
- Supports three fixed-function endpoints
- 256 Byte USB buffer memory
- Integrated transceiver; no external resistors
required
On-Chip Debug
- On-chip debug circuitry facilitates full speed,
non-intrusive in-system debug (no emulator
required)
- Provides breakpoints, single stepping,
inspect/modify memory and registers
- Superior performance to emulation systems using
ICE-chips, target pods, and sockets
Voltage Supply Input: 2.7 to 5.25 V
- Voltages from 3.6 to 5.25 V supported using
On-Chip Voltage Regulator
High Speed 8051 µC Core
- Pipelined instruction architecture; executes 70% of
instructions in 1 or 2 system clocks
- Up to 25 MIPS throughput with 25 MHz clock
- Expanded interrupt handler
Memory
- 1536 bytes internal RAM
(1 k + 256 + 256 USB FIFO)
- 16k bytes Flash; In-system programmable in
512-byte sectors
Digital Peripherals
- 15 Port I/O; All 5 V tolerant with high sink current
- Enhanced UART
- Two general purpose 16-bit timers
Clock Sources
- Internal oscillator: 0.25% accuracy with clock
recovery enabled. Supports all USB and UART
modes
- External CMOS clock
- Can switch between clock sources on-the-fly; useful
in power saving strategies
Packages
- 28-pin QFN
- Temperature Range: –40 to +85 °C
ANALOG
PERIPHERALS
VREG
DIGITAL I/O
UART
Timer 0
Timer 1
Port 0
Port 2
Port 3
USB Controller / Transceiver
PRECISION INTERNAL
OSCILLATOR
LOW FREQUENCY
OSCILLATOR
HIGH-SPEED CONTROLLER CORE
16 KB
ISP FLASH
8
INTERRUPTS
8051 CPU
(25MIPS)
DEBUG
CIRCUITRY
1536 B
SRAM
POR
Rev. 0.5 1/06
Copyright © 2006 by Silicon Laboratories
C8051F326/7
This information applies to a product under development. Its characteristics and specifications are subject to change without notice.




C8051F326 pdf, 반도체, 판매, 대치품
C8051F326/7
7.5. Flash Error Reset.............................................................................................. 62
7.6. Software Reset ................................................................................................. 62
7.7. USB Reset ........................................................................................................ 62
8. Flash Memory ....................................................................................................... 65
8.1. Programming The Flash Memory ..................................................................... 65
8.1.1. Flash Lock and Key Functions ................................................................. 65
8.1.2. Flash Erase Procedure............................................................................. 65
8.1.3. Flash Write Procedure.............................................................................. 66
8.2. Non-volatile Data Storage................................................................................. 67
8.3. Security Options................................................................................................ 67
9. External RAM ........................................................................................................ 71
9.1. Accessing User XRAM...................................................................................... 71
9.2. Accessing USB FIFO Space............................................................................. 72
10. Oscillators ............................................................................................................... 73
10.1.Programmable Internal Oscillator ..................................................................... 73
10.1.1.Adjusting the Internal Oscillator on C8051F326/7 Devices...................... 74
10.1.2.Internal Oscillator Suspend Mode ............................................................ 74
10.2.Internal Low-Frequency (L-F) Oscillator ........................................................... 76
10.3.4x Clock Multiplier ............................................................................................ 77
10.4.System and USB Clock Selection .................................................................... 78
10.4.1.System Clock Selection ........................................................................... 78
10.4.2.USB Clock Selection ................................................................................ 78
11. Port Input/Output .................................................................................................. 81
11.1.Port I/O Initialization ......................................................................................... 83
11.2.General Purpose Port I/O ................................................................................. 83
12. Universal Serial Bus Controller (USB0)................................................................ 89
12.1.Endpoint Addressing ........................................................................................ 90
12.2.USB Transceiver .............................................................................................. 90
12.3.USB Register Access ....................................................................................... 92
12.4.USB Clock Configuration.................................................................................. 96
12.5.FIFO Management ........................................................................................... 97
12.5.1.FIFO Split Mode ....................................................................................... 97
12.5.2.FIFO Double Buffering ............................................................................. 97
12.5.3.FIFO Access ............................................................................................ 98
12.6.Function Addressing......................................................................................... 99
12.7.Function Configuration and Control................................................................ 100
12.8.Interrupts ........................................................................................................ 103
12.9.The Serial Interface Engine ............................................................................ 106
12.10. Endpoint0..................................................................................................... 106
12.10.1.Endpoint0 SETUP Transactions .......................................................... 106
12.10.2.Endpoint0 IN Transactions................................................................... 107
12.10.3.Endpoint0 OUT Transactions............................................................... 107
12.11.Configuring Endpoint1 .................................................................................. 110
12.12.Controlling Endpoint1 IN............................................................................... 110
12.12.1.Endpoint1 IN Interrupt or Bulk Mode.................................................... 110
4 Rev. 0.5

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C8051F326 전자부품, 판매, 대치품
C8051F326/7
List of Figures
1. System Overview
Figure 1.1. C8051F326 Block Diagram .................................................................... 14
Figure 1.2. C8051F327 Block Diagram .................................................................... 15
Figure 1.3. Comparison of Peak MCU Execution Speeds ....................................... 16
Figure 1.4. On-Chip Clock and Reset ...................................................................... 17
Figure 1.5. On-Board Memory Map.......................................................................... 18
Figure 1.6. USB Controller Block Diagram............................................................... 19
Figure 1.7. Development/In-System Debug Diagram............................................... 20
2. Absolute Maximum Ratings
3. Global DC Electrical Characteristics
4. Pinout and Package Definitions
Figure 4.1. C8051F326 QFN-28 Pinout Diagram (Top View) .................................. 26
Figure 4.2. C8051F327 QFN-28 Pinout Diagram (Top View) .................................. 27
Figure 4.3. QFN-28 Package Drawing ..................................................................... 28
Figure 4.4. Typical C8051F326 QFN-28 Landing Diagram...................................... 29
Figure 4.5. Typical C8051F327 QFN-28 Landing Diagram...................................... 30
Figure 4.6. Typical QFN-28 Solder Paste Recommendation ................................... 31
5. Voltage Regulator (REG0)
Figure 5.1. REG0 Configuration: USB Bus-Powered ............................................... 34
Figure 5.2. REG0 Configuration: USB Self-Powered ............................................... 34
Figure 5.3. REG0 Configuration: USB Self-Powered, Regulator Disabled .............. 35
Figure 5.4. REG0 Configuration: No USB Connection............................................. 35
6. CIP-51 Microcontroller
Figure 6.1. CIP-51 Block Diagram............................................................................ 37
Figure 6.2. Memory Map .......................................................................................... 43
7. Reset Sources
Figure 7.1. Reset Sources........................................................................................ 59
Figure 7.2. Power-On and VDD Monitor Reset Timing ............................................ 60
8. Flash Memory
Figure 8.1. Flash Program Memory Map and Security Byte .................................... 68
9. External RAM
Figure 9.1. External Ram Memory Map ................................................................... 71
Figure 9.2. XRAM Memory Map Expanded View..................................................... 72
10. Oscillators
Figure 10.1. Oscillator Diagram................................................................................ 73
11. Port Input/Output
Figure 11.1. Port I/O Functional Block Diagram ....................................................... 81
Figure 11.2. Port I/O Cell Block Diagram ................................................................. 82
12. Universal Serial Bus Controller (USB0)
Figure 12.1. USB0 Block Diagram............................................................................ 89
Figure 12.2. USB0 Register Access Scheme........................................................... 92
Figure 12.3. USB FIFO Allocation ............................................................................ 97
Rev. 0.5
7

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