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PDF UCB1400 Data sheet ( Hoja de datos )
| Número de pieza | UCB1400 | |
| Descripción | Audio codec with touch screen controller and power management monitor | |
| Fabricantes | NXP Semiconductors | |
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( DataSheet : www.DataSheet4U.com )
UCB1400
Audio codec with touch screen controller
and power management monitor
Rev. 02 — 21 June 2002
Product data
1. General description
The UCB1400 is a stereo audio codec equipped with touch screen and power
management interfaces. It integrates an AC ’97 Rev. 2.1 interface for communication
to an AC link host controller such as the Intel Xscale™ processor. The stereo audio
codec inputs connect directly to a microphone or line level sources such as a CD
player. The stereo audio codec outputs at line level and can drive a headphone
directly. The touch screen interface connects directly to a 4-wire resistive touch
screen. A built-in 10-bit analog-to-digital converter provides readout of touch screen
and power management parameters. Ten general-purpose I/O pins provide
programmable inputs and/or outputs to the system.
2. Features
s 48-pin LQFP surface mount package and low external component count for
minimal PCB space requirement
s Integrated AC ’97 Rev. 2.1 interface
s 20-bit stereo audio codec supporting programmable sample rates, and
input/output gain control
x Stereo line input and mono microphone input
x Stereo line/headphone output with bass/treble control
x Headphone driver with short circuit protection and virtual ground for DC
coupling
s 4-wire resistive touch screen interface circuit supporting position, pressure and
plate resistance measurements
s 10-bit successive approximation ADC with internal track-and-hold circuit and
analog multiplexer for touch screen readout and monitoring of four external high
voltage (7.5 V) sources
s Ten general purpose input/output pins
s 3.3 V supply voltage and built-in power saving modes for portable and battery
powered applications.
3. Applications
s Smart mobile phones
s Handheld PCs
s Palm-top PCs
s Personal Intelligent Communicators (PIC)
s Personal Digital Assistants (PDA).
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Philips Semiconductors
7. Functional description
7.1 Functional block diagram
UCB1400
Audio codec with touch screen controller
and power management monitor
LINE_OUT_L
LINE_OUT_R
LINE_IN_L
MICP
LINE_IN_R
MASTER VOL.
0–94.5 dB
(0x02)
DAC_L
VARIABLE RATE
(0x2A, 0x2C)
MASTER VOL.
0–94.5 dB
(0x02)
DAC_R
VARIABLE RATE
(0x2A, 0x2C)
0–22.5 dB
(0x0E)
MUX
(0x1A)
RECORD GAIN
0–22.5 dB
(0x1C)
RECORD GAIN
0–22.5 dB
(0x1C)
ADC_L
VARIABLE RATE
(0x2A, 0x32)
ADC_R
VARIABLE RATE
(0x2A, 0x32)
INTERPOLATION
FILTER & NOISE
SHAPER
DSP
(0x6A)
LOOP BACK
(0x20)
DECIMATION FILTER
OVFL
MICGND
XTL_IN
XTL_OUT
IO[9:0]
TSPX
TSMX
TSPY
TSMY
AD[3:0]
ADCSYNC
GROUND SWITCH (0x1A)
OSCILLATOR / PLL
ADC / TOUCH
POWER UP/DOWN
(0x64, 0x66)
AC97 / AUDIO
POWER UP/DOWN
(0x26, 0x6C)
TOUCH SCREEN
BIASING MATRIX
(0x64)
BIAS
CURRENT
MUX
(0x64,
0x66)
IO BLOCK
DATA (0x5A)
DIRECTION (0x5C)
IO DATA
INTERRUPT GENERATION
POSITIVE (0x5E)
NEGATIVE (0x60)
STATUS/CLEAR (0x62)
INTERRUPT
ADC READY
ADC
CONTROL (0x66)
DATA (0x68)
ADC DATA
Fig 3. Functional block diagram.
RESET
SYNC
BIT_CLK
SDATA_OUT
SDATA_IN
IRQOUT
SN00243
9397 750 09611
Product data
Rev. 02 — 21 June 2002
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
5 of 63
5 Page 
Philips Semiconductors
UCB1400
Audio codec with touch screen controller
and power management monitor
SYNC
BIT_CLK
SDATA_IN
END OF PREVIOUS
AUDIO FRAME
CODEC
READY
TAG PHASE
81.4 ns
(12.288 MHz)
20.8 µs
(48 kHz)
DATA PHASE
slot(1) slot(2)
slot(12) “0” “0” “0” 19
0 19
0 19
0
TIME SLOT “VALID” BITS
(“1” = TIME SLOT CONTAINS VALID PCM DATA)
SLOT 1
SLOT 2
SLOT 3
Fig 8. AC-link audio input frame.
19 0
SLOT 12
SN00223
A new audio input frame begins with a LOW-to-HIGH transition of SYNC. SYNC is
synchronous to the rising edge of BIT_CLK. On the immediately following falling edge
of BIT_CLK, UCB1400 samples the assertion of SYNC. This falling edge marks the
time when both sides of AC-link are aware of the start of a new audio frame. On the
next rising edge of BIT_CLK, UCB1400 transitions SDATA_IN into the first bit position
of slot 0 (‘Codec Ready’ bit). Each new bit position is presented to AC-link on a rising
edge of BIT_CLK, and subsequently sampled by the AC ’97 Controller on the
following falling edge of BIT_CLK. This sequence ensures that data transitions and
subsequent sample points for both incoming and outgoing data streams are time
aligned.
SYNC
BIT_CLK
AC ’97 SAMPLES SYNC ASSERTION HERE
AC ’97 CONTROLLER SAMPLES FIRST
SDATA_IN BIT OF FRAME HERE
SDATA_IN
END OF PREVIOUS
AUDIO FRAME
CODEC
READY
slot(1)
slot(2)
SN00224
Fig 9. Start of an audio input frame.
SDATA_IN’s composite stream is MSB justified (MSB first) with all non-valid bit
positions (for assigned and/or unassigned time slots) stuffed with 0s by the UCB1400.
SDATA_IN data is sampled on the falling edges of BIT_CLK.
9397 750 09611
Product data
Rev. 02 — 21 June 2002
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
11 of 63
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet UCB1400.PDF ] | |
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