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부품번호 T0P243 기능
기능 (T0P242 - T0P2439) Family Extended Power
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T0P243 데이터시트, 핀배열, 회로
www.DataSheet4U.com
TOP242-249
TOPSwitch®-GX Family
Extended Power, Design Flexible,
EcoSmart®, Integrated Off-line Switcher
®
Product Highlights
Lower System Cost, High Design Flexibility
Extended power range to 250 W
Features eliminate or reduce cost of external components
Fully integrated soft-start for minimum stress/overshoot
Externally programmable accurate current limit
Wider duty cycle for more power, smaller input capacitor
Separate line sense and current limit pins on Y/R packages
Line under-voltage (UV) detection: no turn off glitches
Line overvoltage (OV) shutdown extends line surge limit
Line feed forward with maximum duty cycle (DCMAX)
reduction rejects line ripple and limits DC at high line
MAX
Frequency jittering reduces EMI and EMI filtering costs
Regulates to zero load without dummy loading
132 kHz frequency reduces transformer/power supply size
Half frequency option in Y/R packages for video applications
Hysteretic thermal shutdown for automatic fault recovery
Large thermal hysteresis prevents PC board overheating
EcoSmart - Energy Efficient
Extremely low consumption in remote off mode
(80 mW @ 110 VAC, 160 mW @ 230 VAC)
Frequency lowered with load for high standby efficiency
Allows shutdown/wake-up via LAN/input port
Description
TOPSwitch-GX uses the same proven topology as TOPSwitch,
cost effectively integrating the high voltage power MOSFET,
PWM control, fault protection and other control circuitry onto
a single CMOS chip. Many new functions are integrated to
reduce system cost and improve design flexibility, performance
and energy efficiency.
Depending on package type, the TOPSwitch-GX family has
either 1 or 3 additional pins over the standard DRAIN, SOURCE
and CONTROL terminals. allowing the following functions:
line sensing (OV/UV, line feedforward/DC max reduction),
accurate externally set current limit, remote on/off, and
synchronization to an external lower frequency and frequency
selection (132 kHz/66 kHz).
+
AC DC
IN OUT
-
DL
TOPSwitch-GX
CONTROL
C
S XF
Figure 1. Typical Flyback Application.
PI-2632-060200
OUTPUT POWER TABLE
PRODUCT3
230 VAC ±15%4
85-265 VAC
Adapter1
Open
Frame2
Adapter1
Open
Frame2
TOP242 P or G 9 W
TOP242 R 10 W
TOP242 Y 10 W
15 W
22 W
22 W
6.5 W
7W
7W
10 W
14 W
14 W
TOP243 P or G 13 W
TOP243 R 20 W
TOP243 Y 13 W
25 W
43 W
45 W
9W
15 W
15 W
15 W
23 W
30 W
TOP244 P or G 16 W
TOP244 R 28 W
TOP244 Y 30 W
30 W
52 W
65 W
11 W
18 W
20 W
20 W
28 W
45 W
TOP245 R
TOP245 Y
33 W 58 W 20 W 32 W
40 W 85 W 26 W 60 W
TOP246 R
TOP246 Y
37 W 65 W 24 W 36 W
60 W 125 W 40 W 90 W
TOP247 R
TOP247 Y
41 W 73 W 26 W 43 W
85 W 165 W 55 W 125 W
TOP248 R
TOP248 Y
43 W 78 W 28 W 48 W
105 W 205 W 70 W 155 W
TOP249 R
TOP249 Y
45 W 82 W 30 W 52 W
120 W 250 W 80 W 180 W
All package types provide the following transparent features:
Soft-start, 132 kHz switching frequency (automatically reduced
at light load), frequency jittering for lower EMI, wider DCMAX,
hywstewrewtic.DthearmtaaSl shhuetdeotw4nUa.ncdolamrger creepage packages. In
addition, all critical parameters (i.e. current limit, frequency,
PWM gain) have tighter temperature and absolute tolerance, to
simplify design and optimize system cost.
Table 1. Notes: 1. Typical continuous power in a non-ventilated
enclosed adapter measured at 50 °C ambient. Assumes 1 sq. in. of
2 oz. copper heat sink area for R package. 2. Maximum practical
continuous power in an open frame design at 50 °C ambient. See
Key Applications for detailed conditions. Assumes 3 sq. in. of 2 oz.
copper heat sink area for R package. 3. See Part Ordering Information.
4. 230 VAC or 100/115 VAC with doubler.
July 2001




T0P243 pdf, 반도체, 판매, 대치품
www.DataSheet4U.com
TOP242-249
Pin Functional Description
DRAIN (D) Pin:
High voltage power MOSFET drain output. The internal start-
up bias current is drawn from this pin through a switched high-
voltage current source. Internal current limit sense point for
drain current.
CONTROL (C) Pin:
Error amplifier and feedback current input pin for duty cycle
control. Internal shunt regulator connection to provide internal
bias current during normal operation. It is also used as the
connection point for the supply bypass and auto-restart/
compensation capacitor.
LINE-SENSE (L) Pin: (Y or R package only)
Input pin for OV, UV, line feed forward with DCMAX reduction,
remote ON/OFF and synchronization. A connection to SOURCE
pin disables all functions on this pin.
EXTERNAL CURRENT LIMIT (X) Pin: (Y or R package only)
Input pin for external current limit adjustment, remote
ON/OFF, and synchronization. A connection to SOURCE pin
disables all functions on this pin.
MULTI-FUNCTION (M) Pin: (P or G package only)
This pin combines the functions of the LINE-SENSE (L) and
EXTERNAL CURRENT LIMIT (X) pins of the Y package into
one pin. Input pin for OV, UV, line feed forward with DC
MAX
reduction, external current limit adjustment, remote ON/OFF
and synchronization. A connection to SOURCE pin disables all
functions on this pin and makes TOPSwitch-GX operate in
simple three terminal mode (like TOPSwitch-II).
FREQUENCY (F) Pin: (Y or R package only)
Input pin for selecting switching frequency: 132 kHz if
Y Package (TO-220-7C)
Tab Internally
Connected to
SOURCE Pin
P Package (DIP-8B)
G Package (SMD-8B)
R Package
(TO-263-7C)
7D
5F
4S
3X
2L
1C
M1
8S
S2
7S
S3
wCww4.DataShe5et4UD .com 1 2 3 4 5 7
C L X S F D PI-2724-033001
Figure 3. Pin Configuration (top view).
4E
7/01
August 8, 2000
connected to SOURCE pin and 66 kHz if connected to
CONTROL pin. The switching frequency is internally set for
fixed 132 kHz operation in P and G packages.
SOURCE (S) Pin:
Output MOSFET source connection for high voltage power
return. Primary side control circuit common and reference point.
+
DC
Input
Voltage
-
VUV = IUV x RLS
VOV = IOV x RLS
RLS 2 MFor RLS = 2 M
VUV = 100 VDC
VOV = 450 VDC
D L DCMAX@100 VDC = 78%
CONTROL DCMAX@375 VDC = 38%
C
SX
For RIL = 12 k
ILIMIT = 69%
RIL
12 k
See fig. 55 for other
resistor values (RIL)
to select different ILIMIT
values PI-2629-040501
Figure 4. Y/R Package Line Sense and Externally Set Current
Limit.
+
DC
Input
Voltage
VUV = IUV x RLS
VOV = IOV x RLS
RLS
2 M
For RLS = 2 M
VUV = 100 VDC
VOV = 450 VDC
DCMAX@100 VDC = 78%
D M DCMAX@375 VDC = 38%
CONTROL
C
-S
Figure 5. P/G Package Line Sense.
PI-2509-040501
+
DC
Input
Voltage
RIL
For RIL = 12 k
ILIMIT = 69%
For RIL = 25 k
ILIMIT = 43%
See fig. 55 for other
resistor values (RIL)
DM
to select different
ILIMIT values
CONTROL
C
-S
PI-2517-040501
Figure 6. P/G Package Externally Set Current Limit.

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T0P243 전자부품, 판매, 대치품
www.DataSheet4U.com
waveform for the pulse width modulator. This oscillator sets
the pulse width modulator/current limit latch at the beginning
of each cycle.
The nominal switching frequency of 132 kHz was chosen to
minimize transformer size while keeping the fundamental EMI
frequency below 150 kHz. The FREQUENCY pin (available
only in Y or R package), when shorted to the CONTROL pin,
lowers the switching frequency to 66 kHz (half frequency)
which may be preferable in some cases such as noise sensitive
video applications or a high efficiency standby mode. Otherwise,
the FREQUENCY pin should be connected to the SOURCE pin
for the default 132 kHz.
To further reduce the EMI level, the switching frequency is
jittered (frequency modulated) by approximately ±4 kHz at
250 Hz (typical) rate as shown in Figure 9. Figure 46 shows the
typical improvement of EMI measurements with frequency
jitter.
Pulse Width Modulator and Maximum Duty Cycle
The pulse width modulator implements voltage mode control
by driving the output MOSFET with a duty cycle inversely
proportional to the current into the CONTROL pin that is in
excess of the internal supply current of the chip (see Figure 7).
The excess current is the feedback error signal that appears
across RE (see Figure 2). This signal is filtered by an RC
network with a typical corner frequency of 7 kHz to reduce the
effect of switching noise in the chip supply current generated by
the MOSFET gate driver. The filtered error signal is compared
with the internal oscillator sawtooth waveform to generate the
duty cycle waveform. As the control current increases, the duty
cycle decreases. A clock signal from the oscillator sets a latch
which turns on the output MOSFET. The pulse width modulator
resets the latch, turning off the output MOSFET. Note that a
minimum current must be driven into the CONTROL pin
before the duty cycle begins to change.
The maximum duty cycle, DC , is set at a default maximum
MAX
value of 78% (typical). However, by connecting the LINE-
SENSE or MULTI-FUNCTION pin (depending on the package)
to the rectified DC high voltage bus through a resistor with
appropriate value, the maximum duty cycle can be made to
decrease from 78% to 38% (typical) as shown in Figure 11 when
input line voltage increases (see line feed forward with DCMAX
reduction).
Light Load Frequency Reduction
The pulse width modulator duty cycle reduces as the load at the
power supply output decreases. This reduction in duty cycle is
proportional to the current flowing into the CONTROL pin. As
the CONTROL pin current increases, the duty cycle decreases
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reduced linearly until a minimum frequency is reached at a duty
TOP242-249
Switching
Frequency
136 kHz
128 kHz
4 ms
VDRAIN
Time
Figure 9. Switching Frequency Jitter. (Idealized VDRAIN waveform)
cycle of 0% (refer to Figure 7). The minimum frequency is
typically 30 kHz and 15 kHz for 132 kHz and 66 kHz operation,
respectively.
This feature allows a power supply to operate at lower frequency
at light loads thus lowering the switching losses while
maintaining good cross regulation performance and low output
ripple.
Error Amplifier
The shunt regulator can also perform the function of an error
amplifier in primary side feedback applications. The shunt
regulator voltage is accurately derived from a temperature-
compensated bandgap reference. The gain of the error amplifier
is set by the CONTROL pin dynamic impedance. The
CONTROL pin clamps external circuit signals to the VC
voltage level. The CONTROL pin current in excess of the
supply current is separated by the shunt regulator and flows
through RE as a voltage error signal.
On-chip Current Limit with External Programmability
The cycle-by-cycle peak drain current limit circuit uses the
output MOSFET ON-resistance as a sense resistor. A current
limit comparator compares the output MOSFET on-state drain
to source voltage, VDS(ON) with a threshold voltage. High drain
current causes V to exceed the threshold voltage and turns
DS(ON)
the output MOSFET off until the start of the next clock cycle.
The current limit comparator threshold voltage is temperature
compensated to minimize the variation of the current limit due
to temperature related changes in RDS(ON)of the output MOSFET.
The default current limit of TOPSwitch-GX is preset internally.
However, with a resistor connected between EXTERNAL
CURRENT LIMIT (X) pin (Y or R package) or MULTI-
FUNCTION (M) pin (P or G package) and SOURCE pin,
current limit can be programmed externally to a lower level
between 30% and 100% of the default current limit. Please
refer to the graphs in the typical performance characteristics
section for the selection of the resistor value. By setting current
limit low, a larger TOPSwitch-GX than necessary for the power
required can be used to take advantage of the lower RDS(ON) for
higher efficiency/smaller heat sinking requirements. With a
August 8, 2000
7E
7/01

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