THC63LVDM63A Datasheet PDF - THine Electronics
| Part Number | THC63LVDM63A | |
| Description | (THC63LVDF64A / THC63LVDM63A) LVDS 18-Bit Color Host-LCD Panel Interface Receiver | |
| Manufacturers | THine Electronics | |
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There is a preview and THC63LVDM63A download ( pdf file ) link at the bottom of this page. Total 9 Pages | ||
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www.DataSheet4U.com
Version 2.10
THine
PRELIMINARY
THC63LVDM63A/THC63LVDF64A
85MHz LVDS 18 Bit COLOR
HOST-LCD PANEL INTERFACE
General Description
Features
The THC63LVDM63A transmitter converts 21
bits of CMOS/TTL data into LVDS(Low
Voltage Differential Signaling) data stream. A
phase-locked transmit clock is transmitted in
parallel with the data streams over a fourth
LVDS link. The THC63LVDM63A can be
programmed for rising edge or falling edge
clocks through a dedicated pin.
The THC63LVDF64A receiver convert the
LVDS data streams back into 21 bits of
CMOS/TTL data with falling edge clock. At a
transmit clock frequency of 85MHz, 18 bits of
RGB data and 3 bits of LCD timing and control
data (HSYNC, VSYNC, CNTL1) are
transmitted at a rate of 595 Mbps per LVDS data
channel.
21:3 Data channel compression at up to
223 Megabytes per sec throughput
Wide Frequency Range: 20 - 85 MHz
suited for VGA,SVGA,XGA and SXGA
Narrow bus (8 lines) reduces cable size
345mV swing LVDS devices for
Low EMI
Supports Spread Spectrum Clock Generator
On chip Input Jitter Filtering
PLL requires No External Components
Single 3.3V supply with 110mW(TYP)
Low Power CMOS Design
Power-Down Mode
Low profile 48 Lead TSSOP Package
Clock Edge Programmable for Transmitter
Improved Replacement for the National
DS90CF363/364
THC63LVDM63A
THC63LVDF64A
TA0-6
CMOS/TTL
INPUTS
TB0-6
TC0-6
7
7
7
TA+/-
RA+/-
TB+/-
DATA
TC+/- (LVDS)
RB+/-
RC+/-
(140 To 595 Mbit/ On Each
LVDS Channel)
TRANSMITTER
CLK IN
(20 To 85MHz)
R/F
/PDWN
PLL
TCLK+/-
RCLK+/-
CLOCK
(LVDS)
(20 To 85MHz)
OPTIONS
CLOCK
TRIGGERING
www.DataShFaelleintg4EUdg.ce om
Rising Edge
TRANSMITTER
DEVICE
THC63LVDM63A(R/F pin=GND)
THC63LVDM63A(R/F pin=Vcc)
7 RA0-6
7 RB0-6 CMOS/TTL
OUTPUTS
7 RC0-6
RECEIVER
PLL CLOCK OUT
(20 To 85MHz)
/PDWN
RECEIVER
DEVICE
THC63LVDF64A
----
-1-
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Switching Characteristics
Vcc = 3.0 - 3.6V, Ta = -10 - +70 ˚C
SYMBOL
PARAMETER
TRANSMITTER
t TCIT
CLK IN Transition Time
t TCP
CLK IN Period
t TCH
CLK IN High Time
t TCL
CLK IN Low Time
t TCD
CLK IN to TCLK+/- Delay
t TS TTL Data Setup to CLK IN
t TH TTL Data Hold from CLK IN
t LVT
LVDS Transition Time
t TOP1
Output Data Position 0 (T=11.76ns)
t TOP0
Output Data Position 1 (T=11.76ns)
t TOP6
Output Data Position 2 (T=11.76ns)
t TOP5
Output Data Position 3 (T=11.76ns)
t TOP4
Output Data Position 4 (T=11.76ns)
t TOP3
Output Data Position 5 (T=11.76ns)
t TOP2
Output Data Position 6 (T=11.76ns)
t TPLL
Phase Lock Loop Set
RECEIVER
t RCP
CLK OUT Period
t RCH
CLK OUT High Time
t RCL
CLK OUT Low Time
t RCD
RCLK+/- to CLK OUT Delay
t RS TTL Data Setup to CLK OUT
t RH
TTL Data Hold from CLK OUT
t TLH
TTL Low to High Transition Time
t THL
TTL High to Low Transition Time
t RIP1
Input Data Position 0 (T=11.76ns)
t RIP0
Input Data Position 1 (T=11.76ns)
t RIP6
Input Data Position 2 (T=11.76ns)
t RIP5
Input Data Position 3 (T=11.76ns)
t RIP4
Input Data Position 4 (T=11.76ns)
t RIP3
Input Data Position 5 (T=11.76ns)
wtwRwIP.D2 ataSheInept4utUD.caotamPosition 6 (T=11.76ns)
t RPLL
Phase Lock Loop Set
-5-
THine
MIN
11.76
0.35T
0.35T
2.5
2.5
-0.2
T/7-0.2
2T/7-0.2
3T/7-0.2
4T/7-0.2
5T/7-0.2
6T/7-0.2
TYP MAX UNITS
5.0
T 50.0
0.5T 0.65T
0.5T 0.65T
2T/7
0.6 1.5
0.0 0.2
T/7 T/7+0.2
2T/7 2T/7+0.2
3T/7 3T/7+0.2
4T/7 4T/7+0.2
5T/7 5T/7+0.2
6T/7 6T/7+0.2
10.0
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
11.76
3T/7-2.5
4T/7-3.5
-0.4
T/7-0.4
2T/7-0.4
3T/7-0.4
4T/7-0.4
5T/7-0.4
6T/7-0.4
T
4T/7
3T/7
5T/7
3.0
3.0
0.0
T/7
2T/7
3T/7
4T/7
5T/7
6T/7
50.0
5.0
5.0
0.4
T/7+0.4
2T/7+0.4
3T/7+0.4
4T/7+0.4
5T/7+0.4
6T/7+0.4
10
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
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Part DetailsOn this page, you can learn information such as the schematic, equivalent, pinout, replacement, circuit, and manual for THC63LVDM63A electronic component. |
| Information | Total 9 Pages | |
| Link URL | [ Copy URL to Clipboard ] | |
| Download | [ THC63LVDM63A.PDF Datasheet ] | |
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Featured Datasheets
| Part Number | Description | MFRS |
| THC63LVDM63A | The function is (THC63LVDF64A / THC63LVDM63A) LVDS 18-Bit Color Host-LCD Panel Interface Receiver. THine Electronics | |
| THC63LVDM63R | The function is (THC63LVDM63R / THC63LVDM83R) Reduced Swing LVDS 24-Bit / 18-Bit Color Host LCD Panel Interface. THine Electronics | |
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