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PDF ST6397 Data sheet ( Hoja de datos )
| Número de pieza | ST6397 | |
| Descripción | (ST6391 - ST6399) 8-BIT HCMOS MCUs FOR TV FREQUENCY SYNTHESIS WITH OSD | |
| Fabricantes | ST Microelectronics | |
| Logotipo |  |
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ST6391, ST6392, ST6393
ST6395, ST6397, ST6399
DATA SHEET
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DataShee
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ST6391, ST6392, ST6393
® ST6395, ST6397, ST6399
8-BIT HCMOS MCUs
FOR TV FREQUENCY SYNTHESIS WITH OSD
PRELIMINARY DATA
4.5 to 6V supply operating range
8MHz Maximum Clock Frequency
User Program ROM: Up to 20140 bytes
Reserved Test ROM:Up to
340 bytes
Data ROM:
User selectable size
Data RAM:
256 bytes
Data EEPROM:
Up to 384 bytes
42-Pin Shrink Dual in Line Plastic Package
Up to 23 software programmable general pur-
pose Inputs/Outputs, including 2 direct LED
driving Outputs
1
PSDIP42
Two Timers each including an 8-bit counter with
a 7-bit programmable prescaler
Digital Watchdog Function
DataSheet4U(.Ocrodmering Information at the end of the datasheet)
Serial Peripheral Interface (SPI) supporting
S-BUS/ I2C BUS and standard serial protocols
SPI for external frequency synthesis tuning
Up to Six 6-Bit PWM D/A Converters
AFC A/D converter with 0.5V resolution
DEVICE SUMMARY
Five interrupt vectors (IRIN/NMI, Timer 1 & 2,
VSYNC, PWR INT.)
DEVICE
ROM
(Bytes)
EEPROM
(Bytes)
On-chip clock oscillator
ST6391
16K 128
5 Lines by 15 Characters On-Screen Display
Generator with 128 Characters
All ROM types are supported by pin-to-pin
EPROM and OTP versions.
The development tool of the ST639x microcon-
trollers consists of the ST638x-EMU emulation
and development system to be connected via a
standard RS232 serial line to an MS-DOS Per-
sonal Computer.
ST6392
ST6393
ST6395
ST6397
ST6399
20K 128
16K 128
20K 384
20K 384
16K 128
DataShee
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This is Preliminary information from SGS-THOMSON. Details are subject to change without notice.
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ST6391,92,93,95,97,99
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ST639x CORE
Figure 6. ST639x Core Programming Model
The Core of the ST639x Family is implemented inde-
pendently from the I/O or memory configuration.
Consequently, it can be treated as an independent
centralprocessor communicating with I/O and mem-
ory via internal addresses, data, and control busses.
The in-core communication is arranged as shown
in the following block diagram figure; the controller
being externally linked to both the reset and the os-
cillator, while the core is linked to the dedicated on-
chip macrocells peripherals via the serial data bus
and indirectly for interrupt purposes through the
control registers.
INDEX
REGISTER
b 7 X REG. POINTER b0
SHORT
b 7 Y REG. POINTER b0 DIRECT
ADDRESSING
b 7 V REGISTER b0 MODE
b 7 W REGISTER
b0
b 7 ACCUMULATOR b0
b11 PROGRAM COUNTER
b0
Registers
The ST639x Family Core has five registers and
SIX LEVELS
STACK REGISTER
three pairs of flags available to the programmer.
They are shown in Figure 5 and are explained in
the following paragraphs together with the pro-
gram and data memory page registers.
Accumulator (A). The accumulator is an 8-bit gen-
NORMAL FLAGS
C
eral purpose register used in all arithmetic calcula-
tions, logical operations, and data manipulations.
INTERRUPT FLAGS
C
The accumulator is addressed in the data space as
NMI FLAGS
C
RAM location at the FFh address.
Accordingly, the ST639x instruction set can use
the accumulator as any other register of the data
space.
DataSheet4U.com
Z
Z
Z
VA000423
Figure 5. ST639x Core Block Diagram
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| PDF Descargar | [ Datasheet ST6397.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| ST6391 | (ST6391 - ST6399) 8-BIT HCMOS MCUs FOR TV FREQUENCY SYNTHESIS WITH OSD | ST Microelectronics |
| ST6392 | (ST6391 - ST6399) 8-BIT HCMOS MCUs FOR TV FREQUENCY SYNTHESIS WITH OSD | ST Microelectronics |
| ST6393 | (ST6391 - ST6399) 8-BIT HCMOS MCUs FOR TV FREQUENCY SYNTHESIS WITH OSD | ST Microelectronics |
| ST6395 | (ST6391 - ST6399) 8-BIT HCMOS MCUs FOR TV FREQUENCY SYNTHESIS WITH OSD | ST Microelectronics |
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