|
|
PDF CN7221 Data sheet ( Hoja de datos )
| Número de pieza | CN7221 | |
| Descripción | Home Networking Physical Layer Device with Integrated Analog Front End Circuitry | |
| Fabricantes | Conexant Systems | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de CN7221 (archivo pdf) en la parte inferior de esta página. Total 18 Páginas | ||
|
No Preview Available !
www.DataSheet4U.com
LANfinity™ CN7221
Home Networking Physical Layer Device with
Integrated Analog Front End Circuitry
This document describes the CN7221 Home Networking Physical Layer
(PHY) with Integrated Analog Front End (AFE). It includes device pinouts,
signal descriptions, and timing diagrams. The CN7221 allows home
networks to operate over common telephone wires at 1 Mbps. The
CN7221 simplifies system designs and improves their reliability by
eliminating the need for a separate AFE comprised of discrete
components.
The CN7221 supports the emerging home phoneline networking standard
proposed by the Home Phoneline Networking Alliance (HomePNA).
Conexant has announced plans to release a family of multifunction home
phoneline networking chipsets. The first products to be announced in this
family include the RS7111A 1/10/100 PCI/CardBus Multifunction
Controller, the RS7220 Home Networking PHY, the RS7112 Multifunction
Controller with Integrated PHY, and the CN7221 Home Networking PHY
with Integrated AFE (see Ordering Information, page 2).
DataSheet4U.com
The HomePNA phoneline network utilizes existing telephone wiring to
connect computers and devices without interrupting phone service.
Industry-standard home networking products will enable a variety of home
computing opportunities including
• shared Internet access using a single phone line
• printer/peripheral sharing
• file and application sharing
• networked gaming
The CN7221 can be combined with the RS7112 Multifunction PCI/CardBus
Controller and Conexant’s host-controlled (HCF) V.90/K56flex modem to
provide a variety of home networking plus 56 Kbps modem solutions.
Features
• Supports the HomePNA 1.0 specification for
a home phoneline network
• 1 Mbps data rate
• Integrated Analog Front End
• Configurable transmit power level; high- and
low-power
• Configurable transmit data rate; low- and
high-speed
• 32-pin TQFP package
HomePNA 1.0 Specification
Features
DataShee
• Meets HomePNA certification test
requirements
• Uses existing phonelines, no new wires
required
• Compatible with existing services
– Internet access, voice services, and
home network coexist on the same wire
• Robust protocol assures performance over
poor wiring infrastructure
• FCC Part 15- and Part 68-compliant
.
DataSheet4U.com
Data Sheet
Conexant Proprietary Information
Dissemination or use of this information is not permitted without the written permission of Conexant Systems, Inc.
DataSheet4 U .com
Order No. LAN-056
Rev. A, March 12, 1999
1 page  
www.DataSheet4U.com
Home Networking PHY with Integrated AFE
System Signals
The system level signals provide hardware level
initialization, configuration and status indications from the
device. They are shown in Table 1.
The HLAN_OSC pin is the 60 MHz clock input pin.
The HLAN_IRQ signal is an active-low interrupt signal
intended for use as a level-sensitive interrupt to an external
processor. All interrupt sources are maskable and capable
of being stimulated through software via the ISR and IMR
programmable registers.
Signal
HLAN_RESET#
HLAN_IRQ#
HLAN_OSC
Table 1. System Signals
Description
Asynchronous system reset
Active low processor interrupt
60 MHz oscillator input
LANfinity™ CN7221
Seven Wire Serial (7WS) Interface
Signals
The 7-Wire serial interface provides the digital interface to
the Ethernet MAC.
The seven signals that comprise the 7WS are
HLAN_TX_CLK, HLAN_TX_EN, HLAN_TXD,
HLAN_RX_CLK, HLAN_CRS, HLAN_RXD, and HLAN_COL.
Of these, only HLAN_TX_EN and HLAN_TXD are inputs to
the PHY; the other five are outputs from the PHY. These
signals behave differently depending on which operation is
currently happening in the PHY. The operations of the PHY
are as follows:
• Idle (no activity in either direction)
• RxPKT (receiving data)
• TxPKT (transmitting data).
The subsequent subsections analyze each 7WS-related
state of the PHY in detail.
et4U.com
Table 2. 7WS Interface Signals
Signal
Description
HLAN_TX_CLK
Transmit clock
DataSheet4UH.cLoAmN_TX_EN
HLAN_TXD
Transmit enable
Transmit data
HLAN_RX_CLK
Receive clock
HLAN_CRS
Receive carrier sense
HLAN_RXD
Receive data
HLAN_COL
Collision (active high)
DataShee
Idle State
HLAN_TX_CLK
HLAN_TX_EN
HLAN_TXD
HLAN_RX_CLK
HLAN_CRS
HLAN_RXD
HLAN_COL
HLAN_RX_CLK and HLAN_TX_CLK are synchronized to the same phase. All other signals are inactive. The two clock signals
toggle low for 116.7ns and high for 466.7ns, for an overall period of 583.3ns (about 1.7MHz).
DataSheet4ULA.cNo-m056, Rev. A
Conexant
PROPRIETARY INFORMATION
5
DataSheet4 U .com
5 Page 
www.DataSheet4U.com
Home Networking PHY with Integrated AFE
Pinout Diagram
32 31
30 29 28 27 26
25
LANfinity™ CN7221
et4U.com
1 HLAN_OSC
2 HLAN_SPI_DOUT
3 HLAN_SPI_CS#
4 HLAN_SPI_CLK
5 HLAN_RESET#
6 VSS
7 AFE_REF_NOISE
8 AFE_REF_PEAK
DataSheet4U.com
HLAN_RX_CLK 24
HLAN_RXD 23
HLAN_IRQ# 22
SCAN_MODE 21
SCAN_ENABLE 20
VDD 19
AFE_TX_PLUS
AFE_TX_MINUS
18
17
9 10 11 12 13
14 15
16
Figure 4. CN7221 32-pin TQFP Pinout Diagram
DataShee
DataSheet4ULA.cNo-m056, Rev. A
DataSheet4 U .com
Conexant
PROPRIETARY INFORMATION
11
11 Page | ||
| Páginas | Total 18 Páginas | |
| PDF Descargar | [ Datasheet CN7221.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| CN7221 | Home Networking Physical Layer Device with Integrated Analog Front End Circuitry | Conexant Systems |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |