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PDF SH67K93 Data sheet ( Hoja de datos )
| Número de pieza | SH67K93 | |
| Descripción | 24K 4-Bit Micro Controller | |
| Fabricantes | Sino Wealth Microelectronic | |
| Logotipo |  |
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SH67K93
24K 4-bit Micro-Controller with LCD Driver
Feature
SH6610D-Based Single-Chip 4-bit Micro-Controller
- 50 Seg X 8 Com (1/8 duty 1/4 bias or 1/5 bias)
ROM: 24K X 16 bits
Oscillator (Code Option)
RAM: 5784 X 4 bits
OSC
- 48 bytes System Control Register
- Crystal Oscillator 32.768kHz
- 5536 bytes Data Memory
- RC Oscillator: 262kHz
- 200 bytes LCD RAM
OSCX
Operation Voltage: 2.4V - 3.6V
- Ceramic Resonator 3.58MHz/Crystal Oscillator 3.579545MHz
23 CMOS Bi-directional I/O pads (15 shared with LCD
- RC oscillator 1.8MHz
Segments)
Instruction Cycle Time
12 Segments of LCD Shared with Scan Output port
- 122.07µs for 32.768kHz crystal
8-Level Stack (including interrupts)
- 15.27µs for 262 kHz RC
Two 8-bit Timer/Counter
- 2.22µs for 1.8 MHz RC
Powerful Interrupt Sources
- 1.1µs for 3.58MHz ceramic
- External Interrupt (PORTA.0 Rising/Falling edge)
Two Low Power Operation Modes: HALT and STOP
- Timer0 Interrupt
DataSheet4U.cWoamrm-up Timer for Power-On Reset (POR)
- Timer1 Interrupt
Watchdog Timer
- External Interrupts: PORTB, PORTC and PORTD
DTMF/FSK Generator
(Falling edge)
Available In CHIP FORM
LCD Driver
- 50 Seg X 16 Com (1/16 duty 1/4 bias or 1/5 bias)
General Description
SH67K93 is a single-chip 4-bit micro-controller. The device integrates a SH6610D CPU core, RAM, ROM, Timer, LCD driver,
I/O port, DTMF/FSK Generator and FSK/DTMF/CAS decoder. This chip builds in a dual-oscillator to enhance the total chip
performance. The device is suitable for TypeI/II CID cord phone.
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SH67K93
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Pad Description (Total 92 pads)
Pad No.
Pin No.
(QFP100)
24 26
Designation
VDD
I/O
P Digital Power supply
Description
32 36
AVDD
P Analog Power supply
37 41
GND
P Ground pad
30 34
31 35
RESET
TEST
I Reset pad (internal floating, connection for user)
I Test Pad, internal pull-low (no connection for user)
36 40
OSCO
O Low Oscillator output pad (32.768kHz crystal or 262kHz RC)
35 39
OSCI
I Low Oscillator input pad (32.768kHz crystal or 262kHz RC)
34 38
OSCXO
O
High Oscillator output pad
(3.58MHz ceramic/3.579545MHz crystal or 1.8MHz RC)
33 37
38 - 41 42 - 45
OSCXI
PORTA3 - 0
I
High Oscillator input pad
(3.58MHz ceramic/3.579545MHz crystal or 1.8MHz RC)
Bit programmable I/O
I/O PORTA.0 shared with INT0
PORTA.3 had powerful sink capacity to driver LED directly
42 - 45
54 - 57
58 - 61
62 - 65
46 - 49
60 - 63
64 - 67
68 - 71
Bit programmable I/O, Vector interrupt ( INT1 )
PORTB.3
For the caller ID application:
PORTB.2/ FILIN
PORTB.1/ FILOUT
I/O
PORTB.2 is shared with FILIN input pad
PORTB.1 is shared with FILOUT output pad
PORTB.0/ AGCIN
PORTB.0 is shared with AGCIN input pad
WDhaetnaSPOheReTtB40U-.c2oamre shared, the interrupt function for PORTB0 - 3 are
disable and the pull-high resistor setting for PORTB0 - 2 are disable
PORTC3 - 0
/Segment50 - 47
I/O Bit programmable I/O, Vector interrupt ( INT1 )
Segment50 - 47 shared with PORTC
PORTD3 - 0
/Segment46 - 43
I/O Bit programmable I/O, Vector interrupt ( INT1 )
Segment46 - 43 shared with PORTD
PORTE3 - 0
/Segment42 - 39
I/O
Bit programmable I/O
Segment42 - 39 shared with PORTE
66 - 68
72 - 74
PORTF2 - 0
/Segment38 - 36
I/O
Bit programmable I/O
Segment38 - 36 shared with PORTF
69 - 80
75 - 76
79 - 88
Segment35 - 24 O Segment signal for LCD display/scan output port
81 - 11
46 - 53
19 - 12
20, 21,
23, 22
89 - 1
3 - 13
50 - 51,
54 - 59,
21 - 14
22, 23,
25, 24
Segment23 - 1
COM1 - COM16
C1+, C1-,
VP1, VP2
O Segment signal output for LCD display
O Common signal output for LCD display
I Connect with external components of LCD power
25, 26 29, 30
TIP, RING
I Connected with TIP side & Ring side for twisted pair
29 33
DTMF/FSK
O The output pad of DTMF/FSK Generator
27 31
CASTIP
I CAS tone input pad
28 32
OPOUT
O Pre-amplifier output
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SH67K93
Configuration of System Register (Continued)
et4U.com
Address Bit 3
Bit 2
Bit 1
Bit 0 R/W
Remarks
$2A AMP_ON AGC_ON DFIL_ON ADC_ON R/W CID interface control register
GCD3 GCD2 GCD1 GCD0 W AGC gain data
$2B
ADCD3 ADCD2 ADCD1 ADCD0 R ADC data register
R
$2C
WDT
WT2
WT1
WT0
W Bit3: Watchdog time-out flag bit (read operation to reset WDT)
W Bit2 - 0: Watchdog timer prescaler
W
$2D CMPW1 CMPW0
-
O/S3
Bit3 - 2: the schmit-trigger voltage windows control bits
Bit0: Set the segment35 - 24 as sacn output port or segment
R/W signal output for LCD
0: set Segment 35 - 24 as segment signal output for LCD
1: set Segment 35 - 24 as scan output port
$2E -
- B0 B1 R Bit1, 0: Bonding option (read only)
$2F
CAS/
DTMF
-
Bit3: The DTMF/CAS decoder selected control bit
0: DTMF decoder
1: CAS decoder
-
INT0
_FSKIN1
R/W
Bit0: The interrupt mode of FSK receiver control bit, when this
bit is set to 1, the bit of INT0_FSKIN0 is unused.
0: the interrupt edge type of FSK receiver is set by
INT0_FSKIN0
1: Dual edge interrupt mode (rising/falling edge)
DataSheet4U.croemgardless of the bit of INT0_FSKIN0
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| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet SH67K93.PDF ] | |
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