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PDF IP175B Data sheet ( Hoja de datos )

Número de pieza IP175B
Descripción 5 Port 10/100 Ethernet Integrated Switch
Fabricantes IC Plus 
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IP175B
Preliminary Data Sheet
5 Port 10/100 Ethernet Integrated Switch
Features
General Description
IP175A PCB compatible (pins compatible)
IP175B integrates a 6-port switch controller,
Built in 6 MAC and 5 PHY
SSRAM, and 5 10/100 Ethernet transceivers.
Each port can be configured to be 10Base-T, Each of the transceivers complies with the
100Base-TX
IEEE802.3, IEEE802.3u, and IEEE802.3x
2k MAC address
specifications. The DSP approach is utilized for
Support auto-polarity for 10Mbps
designing transceivers with 0.18um technology;
Filter/ forward reserved address option
they have high noise immunity and robust
Broadcast storm protection
performance.
Auto MDI-MDIX
Support three MII/RMII ports
IP175B operates in store and forward mode. It
Support SMI with MDC up to 12.5 Mhz
supports flow control, auto MDI/MDI-X, CoS, port
Support tagging & un-tagging
base VLAN, bandwidth control, DiffServ, SMART
Support Port base VLAN & tag VLAN
MAC and LED functions, etc. Each port can be
Support CoS
configured to auto-negotiation or forced
Support port security option
10M/100M, full/half duplexmode. Using an
Support SMART MAC function
EEPROM or pull up/down resistors on specified
Support spanning tree protocol
pins can configure the desired options.
Max packet length 1552/ 1536 bytes
Support 8-level bandwidth control
Besides a 5-port switch application, IP175B
Support
Support
Link quality
direct, serial
LED
and
dfoural1c0o0lMorbmpsodDe aLtEaDSheet4saUup.ppcploicomarttsion,twhrheiech
MII/RMII
supports 4
ports for router
LAN ports, one WAN
Built in linear regulator control circuit
port and one HOME/PNA or Access point. The
Low power consumption
external MAC can monitor or configure IP175B by
0.18um, 128-pin PQFP
accessing MII registers through SMI0.
MII/RMII port also can be configured to be MAC
mode. It is used to interface an external PHY to
work as a 5+1 switch. Through SMI1 IP175B can
monitor and configure external PHY.
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IP175B pdf
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Pin diagram
IP175B
Preliminary Data Sheet
et4U.com
AVCC
NC
TXOP0
TXOM0
AGND
AVCC
AGND
TXOP1
TXOM1
AVCC
RXIP1
RXIM1
AGND
AVCC
BGRES
AGND
AGND
RXIP2
RXIM2
AVCC
TXOP2
TXOM2
AGND
AVCC
AGND
TXOP3
TXOM3
AVCC
RXIP3
RXIM3
AGND
AGND
RXIP4
RXIM4
AVCC
LOW_10M_EN
TXOP4
TXOM4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
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IP175B
102 LED_SPEED[1] TXD2_0 BF_STM_EN
101 LED_LINK[1] TXD2_1 LINK_Q
100 LED_FULL[0] TXD2_2 X_EN
99 GND_O_1
98 VCC_O_1
97 LED_SPEED[0] TXD2_3 RMII2_CLK_OUT
96 LED_LINK[0] TXEN2 MII0_MAC_MODE
95 GND_SRAM
94 VCC_SRAM
93 RESETB
92 LED_SEL[1]
91 LED_SEL[0]
90 COL0 P0_FORCE
89 MII0_RXCLK RMII0_CLK_IN
88 RXD0_0 P1_FORCE
87 RXD0_1 P2_FORCE
86 RXD0_2 P3_FORCE
85 RXD0_3 P4_FORCE
84 RXDV0
83 GND
82 VCC
81 MII0_TXCLK
80 TXD0_0 P0_FORCE
79 TXD0_1 P1_FORCE
78 TXD0_2 P2_FORCE
77 TXD0_3 P3_FORCE RMII0_CLK_OUT
76 TXEN0 P4_FORCE
75 P4MII_SNI
74 P4EXT MDIO1
73 GND_O_2
72 VCC_O_2
71 MDC0
70 MDIO0
69 COL1 FILTER_RSV_DA
68 MII1_RXCLK RMII1_MAC_CLK_IN
67 RXD1_0 MAC_X_EN
66 RXD1_1 LONG_PKT
65 RXD1_2 AGING RMII1_PHY_CLK_OUT
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IP175B arduino
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IP175B
Preliminary Data Sheet
Pin description (continued)
Pin No.
Label
Type
Description
MII pins used as initial setting (the setting is latched at the end of reset)
69 FILTER_RSV _DA IPL Filter packets with reserved DA (0180c20002~f)
1: Filter the packets,
0: Forward the packets (default).
It is valid only if p4ext is pulled LOW.
66 LONG_PKT IPL Max forwarded packet length
1: 1552 bytes
0: 1536 bytes (default)
65 AGING
IPH2
It is valid only if p4ext is pulled low.
Address aging enable
1: enable, aging time is around 280s (default),
0: disable
It is recommended to disable the aging function, if port-locking
function is enabled.
64 P4_HIGH
IPL2
It is valid only if p4ext is pulled low.
Port4 is set to be high priority port
1: enable,
0: dDisatbaleSdhe(deet4faUu.lct)om
Packets received from port4 are handled as high priority packets
if the feature is enabled.
63 COS_EN
IPL2
It is valid only if p4ext is pulled low.
Class of service enable
1: enable,
0: disabled (default)
Packets with high priority tag are handled as high priority
packets for all ports if the feature is enabled.
It is valid only if p4ext is pulled low.
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