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PDF HSD2M64B2 Data sheet ( Hoja de datos )

Número de pieza HSD2M64B2
Descripción Synchronous DRAM Module 16Mbyte
Fabricantes Hanbit Electronics 
Logotipo Hanbit Electronics Logotipo



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HANBit
HSD2M64B2
Synchronous DRAM Module 16Mbyte (2Mx64-Bit), SO-DIMM,
4Banks, 4K Ref., 3.3V
Part No. HSD2M64B2
GENERAL DESCRIPTION
The HSD2M64B2 is a 2M x 64 bit Synchronous Dynamic RAM high density memory module. The module consists of
two CMOS 512K x 32 bit with 4banks Synchronous DRAMs in TSOP-II 400mil packages on a 144-pin glass-epoxy
substrate. Two 0.1uF decoupling capacitors are mounted on the printed circuit board in parallel for each SDRAM. The
HSD2M64B2 is a SO-DIMM(Small Outline Dual in line Memory Module) and is intended for mounting into 144-pin edge
connector sockets. Synchronous design allows precise cycle control with the use of system clock. I/O transactions are
possible on every clock cycle. Range of operating frequencies, programmable latencies allows the same device to be
useful for a variety of high bandwidth, high performance memory system applications All module components may be
powered from a single 3.3V DC power supply and all inputs and outputs are LVTTL-compatible.
FEATURES
Part Identification
HSD2M64B2-F/10 :100MHz
HSD2M64B2-F/8 :125MHz
* F : Auto Self-Refresh with Low Power
Burst mode operation
Auto & self refresh capability (4096 Cycles/64ms)
LVTTL compatible inputs and outputs
Single 3.3V ±0.3V power supply
MRS cycle with address key programs
- Latency (Access from column address)
- Burst length (1, 2, 4, 8 & Full page)
- Data scramble (Sequential & Interleave)
JEDEC standard 144-Pin SO-DIMM
All inputs are sampled at the positive going edge of the system clock
The used device is 512Kx32Bitx4Banks SDRAM
URL:www.hbe.co.kr
REV.1.0 (August.2002)
DataSheet4 U .com
1 HANBit Electronics Co.,Ltd.

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HSD2M64B2 pdf
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HANBit
HSD2M64B2
DC OPERATING CONDITIONS
(Recommended operating conditions (Voltage referenced to VSS = 0V, TA = 0 to 70°C) )
PARAMETER
SYMBOL
MIN
TYP.
MAX
UNIT
Supply Voltage
Vcc 3.0 3.3 3.6 V
Input High Voltage
VIH
2.0 3.0 Vcc+0.3 V
Input Low Voltage VIL -0.3 0 0.8 V
Output High Voltage
VOH
2.4
-
-V
Output Low Voltage
VOL
-
- 0.4 V
Input leakage current
I LI
-10
-
10 uA
Notes:
1. VIH (max) = 5.6V AC. The overshoot voltage duration is 3ns.
2. VIL (min) = -2.0V AC. The undershoot voltage duration is 3ns.
3. Any input 0V VIN VDDQ.
Input leakage currents include Hi-Z output leakage for all bi-directional buffers with Tri-State outputs.
NOTE
1
2
IOH = -2mA
IOL = 2mA
3
CAPACITANCE
(VCC = 3.3V, TA = 23°C, f = 1MHz, VREF =1.4V ± 200 mV)
DESCRIPTION
SYMBOL
Clock
/RAS, /CAS,/WE,/CS, CKE, DQM
Address
DQ (DQ0 ~ DQ31)
CCLK
CIN
CADD
COUT
MIN
2.5
2.5
2.5
4.0
MAX
4.0
4.5
4.5
6.5
UNITS
pF
pF
pF
pF
DC CHARACTERISTICS
(Recommended operating condition unless otherwise noted, TA = 0 to 70°C)
PARAMETER
SYMBOL
TEST
CONDITION
Operating current
(One bank active)
Precharge standby current in
power-down mode
Precharge standby current in
non power-down mode
ICC1
ICC2P
ICC2PS
ICC2N
Burst length = 1
tRC tRC(min)
IO = 0mA
CKE VIL(max)
tCC=10ns
CKE & CLK VIL(max)
tCC=
CKE VIH(min)
CS* VIH(min), tCC=10ns
Input signals are changed
one time during 20ns
VERSION
-8 -10
130 115
2
2
20
UNIT NOTE
mA 2
mA
mA
mA
URL:www.hbe.co.kr
REV.1.0 (August.2002)
DataSheet4 U .com
5 HANBit Electronics Co.,Ltd.

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