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기능 Quad 2-Channel Multiplexer with 3-State Outputs
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MC74VHCT257A 데이터시트, 핀배열, 회로
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MC74VHCT257A
Quad 2-Channel Multiplexer
with 3-State Outputs
The MC74VHCT257A is an advanced high speed CMOS quad
2–channel multiplexer fabricated with silicon gate CMOS technology.
It achieves high speed operation similar to equivalent Bipolar
Schottky TTL while maintaining CMOS low power dissipation.
It consists of four 2–input digital multiplexers with common select
(S) and enable (OE) inputs. When (OE) is held High, selection of data
is inhibited and all the outputs go Low.
The select decoding determines whether the A or B inputs get routed
to the corresponding Y outputs.
The VHCT inputs are compatible with TTL levels. This device can be
used as a level converter for interfacing 3.3 V to 5.0 V because it has full
5 V CMOS level output swings.
The VHCT257A input structures provide protection when voltages
between 0 V and 5.5 V are applied, regardless of the supply voltage. The
output structures also provide protection when VCC = 0 V. These input and
output structures help prevent device destruction caused by supply
voltage—input/output voltage mismatch, battery backup, hot insertion, etc.
The internal circuit is composed of three stages, including a buffered
output which provides high noise immunity and stable output. The inputs
tolerate voltages up to 7 V, allowing the interface of 5 V systems to 3 V
systems.
High Speed: tPD = 4.1ns (Typ) at VCC = 5V
Low Power Dissipation: ICC = 4µA (Max) at TA = 25°C
TTL–Compatible Inputs: VIL = 0.8 V; VIH = 2.0 V
Power Down Protection Provided on Inputs and Outputs
Balanced Propagation Delays
Designed for 2V to 5.5V Operating Range
Low Noise: VOLP = 0.8V (Max)
Pin and Function Compatible with Other Standard Logic Families
Latchup Performance Exceeds 300mA
ESD Performance: HBM > 2000V; Machine Model > 200V
http://onsemi.com
MARKING DIAGRAMS
SO–16
D SUFFIX
CASE 751B
16 9
VHCT257A
AWLYWW
18
TSSOP–16
DT SUFFIX
CASE 948F
16 9
VHCT257A
ALYW
18
EIAJ SO–16
M SUFFIX
CASE 966
16
VHCT257A
ALYW
1
A
L, WL
Y
W, WW
= Assembly Location
= Wafer Lot
= Year
= Work Week
9
8
S1
A0 2
B0 3
Y0 4
A1 5
B1 6
Y1 7
GND 8
16 VCC
15 OE
14 A3
13 B3
12 Y3
11 A2
10 B2
9 Y2
ORDERING INFORMATION
Device
MC74VHCT257AD
Package
SO–16
Shipping
48 Units/Rail
MC74VHCT257ADR2 SO–16 2500 Tape & Reel
MC74VHCT257ADT TSSOP–16 96 Units/Rail
MC74VHCT257ADTR2 TSSOP–16 2500 Tape & Reel
MC74VHCT257AM EIAJ–SO–16 50 Units/Rail
MC74VHCT257AMEL EIAJ–SO–16 2000 Tape & Reel
Figure 1. Pin Assignment
© Semiconductor Components Industries, LLC, 2001
April, 2001 – Rev. 1
DataSheet4 U .com
1
Publication Order Number:
MC74VHCT257A/D




MC74VHCT257A pdf, 반도체, 판매, 대치품
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MC74VHCT257A
DC CHARACTERISTICS (Voltages Referenced to GND)
Symbol
Parameter
Condition
VCC
(V)
VIH Minimum High–Level
Input Voltage
4.5 to
5.5
VIL Maximum Low–Level
Input Voltage
4.5 to
5.5
VOH
VOL
IIN
Maximum High–Level
Output Voltage
Maximum Low–Level
Output Voltage
Input Leakage Current
VIN = VIH or VIL
IOH = –50 µA
VIN = VIH or VIL
IOH = –8 mA
VIN = VIH or VIL
IOL = 50 µA
VIN = VIH or VIL
IOH = 8 mA
VIN = 5.5 V or GND
4.5
4.5
4.5
4.5
0 to
5.5
IOZ
ICCT
Maximum 3–State
Leakage Current
Maximum Quiescent
Supply Current
VIN = VIH or VIL
VOUT = VCC or GND
VIN = VCC or GND
5.5
5.5
TA = 25°C
Min Typ Max
2
0.8
3.94
3.94
0 0.1
0.36
±0.1
±0.25
4.0
TA 85°C
Min Max
2
0.8
3.8
3.8
0.1
0.44
±1.0
±2.5
40.0
–55°C TA 125°C
Min Max Unit
2V
0.8 V
V
3.66
3.66
V
0.1
0.52
±1.0 µA
±2.5 µA
40.0 µA
ICC Additional Quiescent VIN = VCC or GND
Supply Current
(per pin)
5.5
1.35 1.5
1.5 µA
IOPD
Output Leakage
Current
VOUT = 5.5 V
0
0.5 5
5 µA
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎAC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0ns)
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎSymbol
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎtPLH,
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎtPHL
Parameter
Maximum
Propagation Delay,
A or B to Y
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎtPLH,
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎtPHL
Maximum
Propagation Delay,
S to Y
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎtPZL,
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎtPZH
Maximum Output
Enable,
Time, OE to Y
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎtPLZ,
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎtPHZ
Maximum Output
Disable,
Time, OE to Y
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎCIN MaximumInput
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎCapacitance
Test Conditions
VCC = 3.3 ± 0.3V
CL = 15pF
CL = 50pF
VCC = 5.0 ± 0.5V
CL = 15pF
CL = 50pF
VCC = 3.3 ± 0.3V
CL = 15pF
CL = 50pF
VCC = 5.0 ± 0.5V
CL = 15pF
CL = 50pF
VCC = 3.3 ± 0.3V
RL = 1 kW
CL = 15pF
CL = 50pF
VCC = 5.0 ± 0.5V
RL = 1 kW
CL = 15pF
CL = 50pF
VCC = 3.3 ± 0.3V
RL = 1 kW
CL = 50pF
VCC = 5.0 ± 0.5V
RL = 1 kW
CL = 50pF
TA = 25°C
Min Typ Max
5.8 9.3
8.3 12.8
3.6 5.9
5.1 7.9
7.0 11.0
9.5 14.5
4.0 6.8
5.5 8.8
6.7 10.5
9.2 14.0
3.6 6.8
5.1 11.0
10.5 14.0
9.5 12.0
4 10
TA = 85°C
Min Max
1.0 11.0
1.0 14.5
1.0 7.0
1.0 9.0
1.0 13.0
1.0 16.5
1.0 8.0
1.0 10.0
1.0 12.5
1.0 16.0
1.0 8.0
12.0 10.0
1.0 15.0
–55°C TA 125°C
Min Max
1.0 11.0
1.0 14.5
1.0 7.0
1.0 9.0
1.0 13.0
1.0 16.5
1.0 8.0
1.0 10.0
1.0 12.5
1.0 16.0
1.0 8.0
1.0 12.0
1.0 15.0
Unit
ns
ns
ns
ns
1.0 13.0
1.0
13.0
10 10 pF
Typical @ 25°C, VCC = 5.0 V
CPD Power Dissipation Capacitance (Note 1.)
20 pF
1. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Average operating current can be obtained by the equation: ICC(OPR) = CPD  VCC  fin + ICC. CPD is used to determine the no–load dynamic
power consumption; PD = CPD  VCC2  fin + ICC  VCC.
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MC74VHCT257A 전자부품, 판매, 대치품
www.DataSheet4U.com
MC74VHCT257A
PACKAGE DIMENSIONS
SOIC EIAJ–16
M SUFFIX
CASE 966–01
ISSUE O
16
1
e
Z
D
b
0.13 (0.005) M
9
E HE
8
LE
M_
Q1
L
DETAIL P
VIEW P
A
c
A1
0.10 (0.004)
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH OR PROTRUSIONS AND ARE MEASURED
AT THE PARTING LINE. MOLD FLASH OR
PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006)
PER SIDE.
4. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
5. THE LEAD WIDTH DIMENSION (b) DOES NOT
INCLUDE DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08 (0.003)
TOTAL IN EXCESS OF THE LEAD WIDTH
DIMENSION AT MAXIMUM MATERIAL CONDITION.
DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OR THE FOOT. MINIMUM SPACE
BETWEEN PROTRUSIONS AND ADJACENT LEAD
TO BE 0.46 ( 0.018).
MILLIMETERS
INCHES
DIM MIN MAX MIN MAX
A --- 2.05 --- 0.081
A1 0.05 0.20 0.002 0.008
b 0.35 0.50 0.014 0.020
c 0.18 0.27 0.007 0.011
D 9.90 10.50 0.390 0.413
E 5.10 5.45 0.201 0.215
e 1.27 BSC
0.050 BSC
HE 7.40 8.20 0.291 0.323
L 0.50 0.85 0.020 0.033
LE 1.10 1.50 0.043 0.059
M 0 _ 10 _ 0 _ 10 _
Q1 0.70 0.90 0.028 0.035
Z --- 0.78 --- 0.031
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MC74VHCT257A

Quad 2-Channel Multiplexer with 3-State Outputs

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