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MTV121 데이터시트 PDF




Myson에서 제조한 전자 부품 MTV121은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


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부품번호 MTV121 기능
기능 Super On-Screen-Display
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MTV121 데이터시트, 핀배열, 회로
www.DataSheet4U.com
MYSON
TECHNOLOGY
MTV121
Super On-Screen-Display for LCD Monitor
FEATURES
GENERAL DESCRIPTION
• Horizontal sync input may be up to 130 KHz.
• Acceptable wide-range pixel clock up to 96MHz.
• Full screen display consists of 15 (rows) by 30 (columns)
characters.
• 12 x 18 dot matrix per character.
• Total 272 characters and graphic fonts including 256
standard and 16 multi-color mask ROM fonts.
• 8 color selectable maximum per display character.
• 7 color selectable maximum for character background.
• Double character height and/or width control.
• Programmable positioning for display screen center.
• Bordering, shadowing and blinking effect.
• Programmable character height (18 to 71 lines) control.
• Row to row spacing register to manipulate the constant
display height.
• 4 programmable background windows with multi-level
operation and shadowing on window effect.
• Software clears bit for full-screen erasing.
• Half tone and fast blanking output.
• Fade-in/fade-out effect.
• 8 channels 8 bits PWM D/A converters output.
• Compatible to SPI bus or I2C interface with slave
address 7AH (Slave address is mask option).
• 16 / 20 / 24 pins PDIP / SOP package.
MTV121 is designed for LCD monitor applications
to display the built-in characters or fonts onto an LCD
monitor screen. The display operation is by transfer-
ring data and control information from micro control-
ler to RAM through a serial data interface. It can
execute full screen display automatically and spe-
cific functions such as character background color,
bordering, shadowing, blinking, double height and
width, font by font color control, frame positioning,
frame size control by character height and row-to-
row spacing, horizontal display resolution, full-screen
erasing, fade-in/fade-out effect, windowing effect and
shadowing on window.
MTV121 provide 256 standard and 16 multi-color
fonts for more efficacious applications. The full OSD
menu is formed of 15 rows x 30 columns which can
be positioned on anywhere of the monitor screen by
changing vertical delay or horizontal delay.
Moreover, MTV121 also provide 8 PWM DAC
channels with 8 bits resolution and a PWM clock out-
put for external digital to analog control.
BLOCK DIAGRAM
SSB
SCK
SDA
VFLB
HFLB
NC
XIN
PWM0
PWM1
PWM2
PWM3
PWM4
PWM5
PWM6
PWM7
SERIAL DATA
INTERFACE
8DATA
9ROW, COL
ACK
ARWDB
HDREN
VDREN
NROW
ADDRESS BUS
ADMINISTRATOR
5 RCADDR
9 DADDR
9 FONTADDR
5 WINADDR
5 PWMADDR
VSP CH 7
CHS
VERTD 8
VERTICAL
DISPLAY
CONTROL
5 LPN
NROW
VDREN
HORIZONTAL
ARWDB
HSP HORD 8 DISPLAY CONTROL HDREN
CLOCK
GENERATOR
VCLKX
PWM D/A
CONVERTER
8 DATA
DATA 8
CWS
CHS
DISPLAY & ROW
CONTROL
REGISTERS
LUMAR
LUMAG
LUMAB
BLINK
8 CRADDR
DATA 8
LPN 5
CWS
VCLKS
CHARACTER ROM LUMA
USER FONT RAM
BORDER
LUMINANCE &
BORDGER
GENERATOR
DATA 8
8 VERTD
8 HORD
7 CH
WINDOWS &
FRAME
CONTROL
BSEN
SHADOW
OSDENB
HSP
VSP
LUMAR
LUMAG
LUMAB
BLINK
VCLKX
COLOR
ENCODER
POWER ON
PRB
RESET
VDD
VSS
VDDA
VSSA
ROUT
GOUT
BOUT
FBKG
HTONE
This datasheet contains new product information. Myson Technology reserves the rights to modify the product specification without notice.
No liability is assumed as a result of the use of this procuts. No rights under any patent accompany the sales of the product.
1/18
MTV121 Revision 5.0 06/29/1999
DataSheet4 U .com




MTV121 pdf, 반도체, 판매, 대치품
www.DataSheet4U.com
MYSON
TECHNOLOGY
MTV121
SSB
SCK
SDA
MS
B
LSB
first byte
last byte
FIGURE 1. Data Transmission Protocol (SPI)
There are three transmission formats shown as below:
Format (a) R - C - D R - C - D R - C - D
Format (b) R - C - D C - D C - D C - D
Format (c) R - C - D D D D D D
Where R=Row address, C=Column address, D=Display data
3.1.2 I2C bus
I2C bus operation is only selected when SSB pin is left floating. And a valid transmission should be starting
from writing the slave address 7AH, which is mask option, to MTV121. The protocol is shown in Figure 2.
SCK
SDA
START
B7 B6
first byte
B0 B7
B0
ACK
¡@¡@¡@¡@
¡@
second byte
last byte
FIGURE 2. Data Transmission Protocol (I2C)
ACK
STOP
There are three transmission formats shown as below:
Format (a) S - R - C - D R - C - D R - C - D
Format (b) S - R - C - D C - D C - D C - D
Format (c) S - R - C - D D D D D D
Where S=Slave address, R=Row address, C=Column address, D=Display data
Each arbitrary length of data packet consists of 3 portions viz, Row address (R), Column address (C), and
Display data (D). Format (a) is suitable for updating small amount of data which will be allocated with different
row address and column address. Format (b) is recommended for updating data that has same row address
but different column address. Massive data updating or full screen data change should use format (c) to
increase transmission efficiency. The row and column address will be incremented automatically when the
format (c) is applied. Furthermore, the undefined locations in display or fonts RAM should be filled with
dummy data.
There are 2 types of data should be accessed through the serial data interface, one is ADDRESS bytes of dis-
play registers, and other is ATTRIBUTE bytes of display registers, the protocol are same for all except bit5 of
row address. The MSB(b7) is used to distinguish row and column addresses when transferring data from
external controller. The bit6 of column address is used to differentiate the column address for format (a), (b)
and format (c) respectively. Bit5 of row address for display register is used to distinguish ADDRESS byte
when it is set to "0" and ATTRIBUTE byte when it is set to "1". See Table 1 on page 4.
DataSheet4 U .com
4/18
MTV121 Revision 5.0 06/29/1999

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MTV121 전자부품, 판매, 대치품
www.DataSheet4U.com
MYSON
TECHNOLOGY
MTV121
ROW #
01
0
1
13
14
COLUMN #
DISPLAY
REGISTERS
28 29
30
31
ROW
CTRL REG
R
E
S
E
R
V
E
D
ROW 15
02
WINDOW1
COLUMN#
3
56
89
11
WINDOW2 WINDOW3 WINDOW4
FIGURE 4. Memory Map
12 22
FRAME
CRTL REG
23 30
PWM D/A
CRTL REG
ADDRESS BYTE
b7 b6 b5 b4 b3 b2 b1 b0
MSB
CRADDR
LSB
CRADDR - Define ROM character address.
ATTRIBUTE BYTE
b7 b6 b5 b4 b3 b2 b1 b0
- BGR BGG BGB BLINK R G B
BGR, BGG, BGB - These three bits define the color of the background for its relative address character. If all
three bits are clear, no background will be shown(transparent). Therefore, total 7 back-
ground color can be selected.
BLINK - Enable blinking effect while this bit is set to " 1 ". And the blinking is alternate per 32 vertical frames.
R, G, B - These three bits are used to specify its relative address character color.
1. Row Control Registers, (Row 0 - 14)
b7 b6 b5 b4 b3 b2 b1 b0
COLN 30
- - - - - - CHS CWS
CHS - Define double height character to the respective row.
CWS - Define double width character to the respective row.
3.6 Character ROM
7/18
MTV121 Revision 5.0 06/29/1999
DataSheet4 U .com

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MTV121

Super On-Screen-Display

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