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AT91SAM7A3 데이터시트 PDF




ATMEL Corporation에서 제조한 전자 부품 AT91SAM7A3은 전자 산업 및 응용 분야에서
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부품번호 AT91SAM7A3 기능
기능 AT91 ARM Thumb-based Microcontrollers
제조업체 ATMEL Corporation
로고 ATMEL Corporation 로고


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AT91SAM7A3 데이터시트, 핀배열, 회로
www.DataSheet4U.com
Features
Incorporates the ARM7TDMI ® ARM® Thumb® Processor
– High-performance 32-bit RISC Architecture
– High-density 16-bit Instruction Set
– Leader in MIPS/Watt
Embedded ICE In-circuit Emulation, Debug Communication Channel Support
256 Kbytes of Internal High-speed Flash, Organized in 1024 Pages of 256 Bytes
– Single Cycle Access at Up to 30 MHz in Worst Case Conditions
– Prefetch Buffer Optimizing Thumb Instruction Execution at Maximum Speed
– Page Programming Time: 4 ms, Including Page Auto-erase, Full Erase Time: 10 ms
– 10,000 Write Cycles, 10-year Data Retention Capability, Sector Lock Capabilities
32K Bytes of Internal High-speed SRAM, Single-cycle Access at Maximum Speed
Memory Controller (MC)
– Embedded Flash Controller, Abort Status and Misalignment Detection
– Memory Protection Unit
Reset Controller (RSTC)
– Based on Three Power-on Reset Cells
– Provides External Reset Signal Shaping and Reset Sources Status
Clock Generator (CKGR)
– Low-power RC Oscillator, 3 to 20 MHz On-chip Oscillator and One PLL
Power Management Controller (PMC)
– Power Optimization Capabilities, including Slow Clock Mode (Down to 500 Hz), Idle
Mode, Standby Mode and Backup Mode
– Four Programmable External Clock Signals
Advanced Interrupt Controller (AIC)
– Individually Maskable, Eight-level Priority, Vectored Interrupt Sources
– Four External Interrupt Sources and One Fast Interrupt Source, Spurious Interrupt
Protected
Debug Unit (DBGU)
– 2-wire UART and Support for Debug Communication Channel interrupt,
Programmable ICE Access Prevention
Periodic Interval Timer (PIT)
– 20-bit Programmable Counter plus 12-bit Interval Counter
Windowed Watchdog (WDT)
– 12-bit key-protected Programmable Counter
– Provides Reset or Interrupt Signal to the System
– Counter May Be Stopped While the Processor is in Debug Mode or in Idle State
Real-time Timer (RTT)
– 32-bit Free-running Counter with Alarm
– Runs Off the Internal RC Oscillator
Two Parallel Input/Output Controllers (PIO)
– Sixty-two Programmable I/O Lines Multiplexed with up to Two Peripheral I/Os
– Input Change Interrupt Capability on Each I/O Line
– Individually Programmable Open-drain, Pull-up resistor and Synchronous Output
Shutdown Controller (SHDWC)
– Programmable Shutdown Pin and Wake-up Circuitry
Four 32-bit Battery Backup Registers for a Total of 16 Bytes
One 8-channel 20-bit PWM Controller (PMWC)
One USB 2.0 Full Speed (12 Mbits per Second) Device Port
– On-chip Transceiver, 2-Kbyte Configurable Integrated FIFOs
Nineteen Peripheral Data Controller (PDC) Channels
Two CAN 2.0B Active Controllers, Supporting 11-bit Standard and 29-bit Extended
Identifiers
– 16 Fully Programmable Message Object Mailboxes, 16-bit Time Stamp Counter
Two 8-channel 10-bit Analog-to-Digital Converter
AT91 ARM®
Thumb®-based
Microcontrollers
AT91SAM7A3
Summary
Preliminary
6042AS–ATARM–23-Dec-04
Note: This is a summary document. A complete document
is available on our Web site at www.atmel.com.




AT91SAM7A3 pdf, 반도체, 판매, 대치품
Preliminary
Signal Description
Table 1. Signal Description
Signal Name
VDDIN
VDDIO
VDDBU
VDDANA
VDDOUT
VDDCORE
VDDPLL
GND
GNDANA
GNDBU
GNDPLL
XIN
XOUT
PLLRC
PCK0 - PCK3
SHDW
Function
Type
Power
1.8V Voltage Regulator Power Supply
Power
I/O Lines and Flash Power Supply
Power
Backup I/O Lines Power Supply
Power
Analog Power Supply
Power
1.8V Voltage Regulator Output
Power
1.8V Core Power Supply
Power
1.8V PLL Power Supply
Power
Ground
Ground
Analog Ground
Ground
Backup Ground
Ground
PLL Ground
Ground
Clocks, Oscillators and PLLs
Main Oscillator Input
Input
Main Oscillator Output
Output
PLL Filter
Input
Programmable Clock Output
Output
Shut-Down Control
Output
Active
Level
WKUP0 - WKUP1
FWKUP
Wake-Up Inputs
Force Wake Up
TCK
TDI
TDO
TMS
JTAGSEL
Test Clock
Test Data In
Test Data Out
Test Mode Select
JTAG Selection
NRST
TST
Microcontroller Reset
Test Mode Select
DRXD
DTXD
Debug Receive Data
Debug Transmit Data
Input
Input
ICE and JTAG
Input
Input
Output
Input
Input
Reset/Test
I/O
Input
Debug Unit
Input
Output
Low
Comments
2.7V to 3.6V
3V to 3.6V
3V to 3.6V
3V to 3.6V
1.85V typical
1.65V to 1.95V
1.65V to 1.95V
Driven at 0V only. Do not tie over
VDDBU
Accept between 0V and VDDBU
Accept between 0V and VDDBU
No pull-up resistor
No pull-up resistor
No pull-up resistor
Pull-down resistor
Pull-down resistor
4 AT91SAM7A3 Preliminary
6042AS–ATARM–23-Dec-04

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AT91SAM7A3 전자부품, 판매, 대치품
AT91SAM7A3 Preliminary
Package and Pinout
100-lead LQFP
Mechanical Overview
Figure 2 shows the orientation of the 100-lead LQFP package. A detailed mechanical
description is given in the section Mechanical Characteristics of the product datasheet.
Figure 2. 100-lead LQFP Pinout (Top View)
75
76
51
50
Pinout
100
1
Table 2. Pinout in 100-lead LQFP Package
1 GND
26 VDDBU
2 NRST
27 FWKUP
3 TST
28 WKUP0
4 PB13
29 WKUP1
5 PB12
30 SHDW
6 PB11
31 GNDBU
7 PB10
32 PA4
8 PB9
33 PA5
9 PB8
34 PA6
10 PB7
35 PA7
11 PB6
36 PA8
12 PB5
37 PA9
13 PB4
38 VDDIO
14 PB3
39 GND
15 VDDIO
40 VDDCORE
16 GND
41 PA10
17 VDDCORE
42 PA11
18 PB2
43 PA12
19 PB1
44 PA13
20 PB0
45 PA14
21 PA0
46 PA15
22 PA1
47 PA16
23 PA2
48 PA17
24 PA3
49 PA18
25 GND
50 PA19
26
25
51 PA20
52 PA21
53 PA22
54 PA23
55 PA24
56 PA25
57 PA26
58 PA27
59 VDDCORE
60 GND
61 VDDIO
62 PA28
63 PA29
64 PA30
65 PA31
66 JTAGSEL
67 TDI
68 TMS
69 TCK
70 TDO
71 GND
72 VDDPLL
73 XOUT
74 XIN
75 GNDPLL
76 PLLRC
77 VDDANA
78 ADVREFP
79 GNDANA
80 PB14/AD00
81 PB15/AD01
82 PB16/AD02
83 PB17/AD03
84 PB18/AD04
85 PB19/AD05
86 PB20/AD06
87 PB21/AD07
88 VDDIO
89 PB22/AD10
90 PB23/AD11
91 PB24/AD12
92 PB25/AD13
93 PB26/AD14
94 PB27/AD15
95 PB28/AD16
96 PB29/AD17
97 DDM
98 DDP
99 VDDOUT
100 VDDIN
6042AS–ATARM–23-Dec-04
Preliminary
7

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