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PDF PM6675A Data sheet ( Hoja de datos )

Número de pieza PM6675A
Descripción High Efficiency Step Down Controller
Fabricantes ST Microelectronics 
Logotipo ST Microelectronics Logotipo



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PM6675A
High efficiency step-down controller
with embedded 2A LDO regulator
Target Specification
Features switching
Switching section
– 4.5V to 36V input voltage range
– 0.6V, ±1% voltage reference
– Selectable 1.5V fixed output voltage
– Adjustable 0.6V to 3.3V output voltage
– 1.237V ±1% reference voltage available
– Very fast load transient response using
constant-on-time control loop
– No RSENSE current sensing using low side
MOSFETs' RDS(ON)
– Negative current limit
– Latched OVP and UVP
– Soft start internally fixed at 3ms
– Selectable pulse skipping at light load
– Selectable No-Audible (33KHz) pulse skip
mode
– Ceramic output capacitors supported
– Output voltage ripple compensation
– Output soft-end
LDO regulator section
– Adjustable 0.6V to 2.5V output voltage
– Selectable ±1Apk or ±2Apk current limit
– Dedicated power-good signal
– Ceramic output capacitors supported
– Output soft-end
Applications
Industrial application on 24V
Graphic cards
Embedded computer systems
VFQFPN-24 4x4
Description
The PM6675A device consists of a single high
efficiency step-down controller and an
independent Low Drop-Out (LDO) linear
regulator.
The Constant On-Time (COT) architecture
assures fast transient response supporting both
electrolytic and ceramic output capacitors. An
embedded integrator control loop compensates
the DC voltage error due to the output ripple.
Selectable low-consumption mode allows the
highest efficiency over a wide range of load
conditions. The low-noise mode sets the minimum
switching frequency to 33kHz for audio-sensitive
applications. The LDO linear regulator can sink
and source up to 2Apk. Two fixed current limit
(±1A- ±2A) can be chosen.
An active Soft-End is independently performed on
both the switching and the linear regulators
outputs when disabled.
Order codes
Part number
PM6675A
Package
VFQFPN-24 4x4 (Exposed Pad)
Packaging
Tube
October 2006
Rev 1
This is preliminary information on a new product foreseen to be developed. Details are subject to change without notice.
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PM6675A pdf
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PM6675A
2.2 Pin description
Pin settings
Table 1. Pin functions
N° Pin
Function
1
LGND
LDO power ground. Connect to negative terminal of VTT output capacitor.
2
LFB
LDO remote sensing. Connect as close as possible to the load via a low
noise PCB trace.
3
NOSKIP
Pulse-Skip/No-Audible Pulse-Skip Modes selector.
See Mode of Operation Selection section for details.
4
LPG
LDO section Power-Good signal (open drain output). High when LDO output
voltage is within ±10% of nominal value.
Ground Reference for analog circuitry, control logic and VTTREF buffer.
5
SGND
Connect together with the thermal pad and VTTGND to a low impedance
ground plane. See the Application Note for details.
6
AVCC
+5V supply for internal logic. Connect to +5V rail through a simple RC
filtering network.
High accuracy output voltage reference (1.237V) for multilevel pins setting. It
7
VREF
can deliver up to 50uA. Connect a 100nF capacitor between VREF and
SGND in order to enhance noise rejection.
Frequency Selection. Connect to the central tap of a resistor divider to set
8
VOSC
the desired switching frequency. The pin cannot be left floating. See Device
Description section for details.
Switching section output remote sensing and discharge path during output
9
VSNS
Soft-End. Connect as close as possible to the load via a low noise PCB
trace.
Fixed output selector and feedback input for the switching controller.
10
VSEL
If VSEL pin voltage is higher than 4V, the fixed 1.5V output is selected. If
VSEL pin voltage is lower than 4V, it is used as negative input of the error
amplifier. See Mode of Operation Selection section for details.
11
COMP
DC voltage error compensation pin for input the switching section. Refer to
Mode of Operation Selection section for more details.
12
LILIM
Current limit selector for the LDO. Connect to SGND for ±1A current limit or
to +5V for ±2A current limit.
13
SWEN
Switching Controller Enable. When tied to ground, the switching output is
turned off and a Soft-End is performed.
14
LEN
Linear Regulator Enable. When tied to ground, the LDO output is turned off
and a Soft-End is performed.
15
SPG
Switching Section Power-Good signal (open drain output). High when the
switching regulator output voltage is within ±10% of nominal value.
16
PGND
Power ground for the switching section.
17 LGATE Low-side gate driver output.
18
VCC
+5V low-side gate driver supply. Bypass with a 100nF capacitor to PGND.
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PM6675A
5 Block diagram
Block diagram
Figure 3. Functional and block diagram
VREF
VOSC
LFB
LIN
LOUT
LGND
LPG
SGND
Vr = 0.6V
1.236V
Bandgap
_
LILIM
+
Ton
1-shot
Ton
min
1-shot
Toff
min
1-shot
Anti Cross
Conduction
Level
shifter
LDS
LEN
0.6V
Vr +10%
+
-
+
-
Vr -10%
UVP/OVP
_ VREF
+
Zero Crossing
& Current
Limit
SWEN
Vr +10%
_ Vr
gm
+
+
-
+
-
Vr
Vr -10%
AVCC
UVLO
SWEN LDS LDS LEN
LILIM
NOSKIP
CONTROL LOGIC
Thermal Shutdown
SDS
adj fix
BOOT
HGATE
PHASE
VCC
LGATE
PGND
CSNS
COMP
SPG
VSNS
LEN SWEN VSEL
Table 6. Legend
SWEN
Switching controller enable
LEN LDO regulator enable
LDS LDO output discharge enable
SDS
Switching output discharge enable
LILIM
LDO regulator current limit
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