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PDF AD7401 Data sheet ( Hoja de datos )
| Número de pieza | AD7401 | |
| Descripción | Isolated Sigma-Delta Modulator | |
| Fabricantes | Analog Devices | |
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Data Sheet
Isolated Sigma-Delta Modulator
AD7401
FEATURES
20 MHz maximum external clock rate
Second-order modulator
16 bits no missing codes
±2 LSB INL typical at 16 bits
3.5 μV/°C maximum offset drift
On-board digital isolator
On-board reference
Low power operation: 20 mA maximum at 5.25 V
−40°C to +105°C operating range
16-lead SOIC package
Safety and regulatory approvals
UL recognition
5000 V rms for 1 minute per UL 1577
CSA Component Acceptance Notice #5A
VDE Certificate of Conformity
DIN V VDE V 0884-10 (VDE V 0884-10):2006-12
VIORM = 891 V peak
APPLICATIONS
AC motor controls
Data acquisition systems
A/D + opto-isolator replacements
GENERAL DESCRIPTION
The AD74011 is a second-order, sigma-delta (Σ-Δ) modulator
that converts an analog input signal into a high speed, 1-bit data
stream with on-chip digital isolation based on Analog Devices,
Inc., iCoupler® technology. The AD7401 operates from a 5 V
power supply and accepts a differential input signal of ±200 mV
(±320 mV full scale). The analog input is continuously sampled
by the analog modulator, eliminating the need for external sample-
and-hold circuitry. The input information is contained in the
output stream as a density of ones with a data rate up to 20 MHz.
The original information can be reconstructed with an appropriate
digital filter. The serial input/output can use a 5 V or a 3 V
supply (VDD2).
The serial interface is digitally isolated. High speed CMOS,
combined with monolithic air core transformer technology,
means the on-chip isolation provides outstanding performance
characteristics, superior to alternatives such as optocoupler devices.
The device contains an on-chip reference. The AD7401 is offered
in a 16-lead SOIC and has an operating temperature range of
−40°C to +105°C.
An internal clock version, AD7400, is also available.
1 Protected by U.S. Patents 5,952,849; 6,873,065; and 7,075,329.
FUNCTIONAL BLOCK DIAGRAM
VDD1
VDD2
VIN+
VIN–
T/H
Σ-∆ ADC
BUF
REF
CONTROL LOGIC
UPDATE
ENCODE
WATCHDOG
AD7401
WATCHDOG
DECODE
UPDATE
MDAT
DECODE
ENCODE
MCLKIN
GND1
Figure 1.
GND2
Rev. E
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2006–2015 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
1 page  
AD7401
Data Sheet
Parameter
LOGIC OUTPUTS
Output High Voltage, VOH
Output Low Voltage, VOL
POWER REQUIREMENTS
VDD1
VDD2
IDD16
IDD27
Y Version1,2 Unit
VDD2 − 0.1
0.4
V min
V max
4.5/5.25
3/5.5
12
8
4
V min/V max
V min/V max
mA max
mA max
mA max
Test Conditions/Comments
IO = −200 μA
IO = +200 μA
VDD1 = 5.25 V
VDD2 = 5.5 V
VDD2 = 3.3 V
1 Temperature range is −40°C to +85°C.
2 All voltages are relative to their respective ground.
3 See the Terminology section.
4 For fMCLK > 16 MHz to 20 MHz, mark space ratio is 48/52 to 52/48, VDD1 = VDD2 = 5 V ± 5%, and TA = −40°C to +85°C.
5 Sample tested during initial release to ensure compliance.
6 See Figure 15.
7 See Figure 17.
TIMING SPECIFICATIONS
VDD1 = 4.5 V to 5.25 V, VDD2 = 3 V to 5.5 V, TA = TMAX to TMIN, unless otherwise noted.1
Table 2.
Parameter
fMCLKIN2, 3
t14
t24
t3
t4
Limit at TMIN, TMAX
20
5
25
15
0.4 × tMCLKIN
0.4 × tMCLKIN
Unit
MHz max
MHz min
ns max
ns min
ns min
ns min
Description
Master clock input frequency
Master clock input frequency
Data access time after MCLK rising edge
Data hold time after MCLK rising edge
Master clock low time
Master clock high time
1 Sample tested during initial release to ensure compliance
2 Mark space ratio for clock input is 40/60 to 60/40 for fMCLKIN to 16 MHz and 48/52 to 52/48 for fMCLKIN > 16 MHz to 20 MHz.
3 VDD1 = VDD2 = 5 V ± 5% for fMCLKIN > 16 MHz to 20 MHz.
4 Measured with the load circuit of Figure 2 and defined as the time required for the output to cross 0.8 V or 2.0 V.
200µA
IOL
MCLKIN
MDAT
TO OUTPUT
PIN CL
25pF
1.6V
200µA
IOH
Figure 2. Load Circuit for Digital Output Timing Specifications
t4
t1 t2 t3
Figure 3. Data Timing
Rev. E | Page 4 of 20
5 Page 
AD7401
250
200
VDD1 = VDD2 = 4.5V
MCLKIN = 16MHz
VDD1 = VDD2 = 4.5V
MCLKIN = 10MHz
150
VDD1 = VDD2 = 4.5V
MCLKIN = 5MHz
VDD1 = VDD2 = 5V
MCLKIN = 5MHz
100 VDD1 = VDD2 = 5V
MCLKIN = 16MHz
50
0
–50
–100
–150
–200
VDD1 = VDD2 = 5.25V
MCLKIN = 16MHz
VDD1 = VDD2 = 5V
MCLKIN = 10MHz
VDD1 = VDD2 = 5.25V
MCLKIN = 10MHz
VDD1 = VDD2 = 5.25V
MCLKIN = 5MHz
–250
–45 –35 –25 –15 –5 5 15 25 35 45 55 65 75 85 95 105
TEMPERATURE (°C)
Figure 12. Offset Drift vs. Temperature for Various Supply Voltages
200.5
200.4
200.3
200.2
200.1
200.0
199.9
VDD1 = VDD2 = 4.5V
MCLKIN = 16MHz
VDD1 = VDD2 = 4.5V
MCLKIN = 5MHz
VDD1 = VDD2 = 5V
MCLKIN = 16MHz
VDD1 = VDD2 = 5.25V
MCLKIN = 16MHz
VDD1 = VDD2 = 5V
MCLKIN = 10MHz
VDD1 = VDD2 = 4.5V
MCLKIN = 10MHz
VDD1 = VDD2 = 5V
MCLKIN = 5MHz
VDD1 = VDD2 = 5.25V
MCLKIN = 10MHz
VDD1 = VDD2 = 5.25V
MCLKIN = 5MHz
199.8
199.7
199.6
199.5
–45 –35 –25 –15 –5 5 15 25 35 45 55 65 75 85 95 105
TEMPERATURE (°C)
Figure 13. Gain Error Drift vs. Temperature for Various Supply Voltages
0.0105
0.0100
VDD1 = VDD2 = 5V
TA = 25°C
0.0095 MCLKIN = 16MHz
0.0090
0.0085
0.0080
MCLKIN = 10MHz
0.0075
0.0070
MCLKIN = 5MHz
0.0065
–0.33 –0.28 –0.23 –0.18 –0.13 –0.08 –0.03 0.03 0.08 0.13 0.18 0.23 0.28 0.33
VIN DC INPUT VOLTAGE (V)
Figure 14. IDD1 vs. VIN DC Input Voltage
Data Sheet
0.0105
VDD1 = VDD2 = 5V
MCLKIN = 16MHz
0.0100
MCLKIN = 16MHz TA = +85°C
MCLKIN = 16MHz
0.0095
TA = –40°C
TA = +105°C
0.0090
0.0085
MCLKIN = 10MHz
TA = –40°C
MCLKIN = 10MHz
TA = +105°C
0.0080
0.0075
MCLKIN = 10MHz
TA = +85°C
0.0070
0.0065
MCLKIN = 5MHz
MCLKIN = 5MHz TA = –40°C MCLKIN = 5MHz
TA = +85°C
TA = +105°C
0.0060
–0.33 –0.28 –0.23 –0.18 –0.13 –0.08 –0.03 0.03 0.08 0.13 0.18 0.23 0.28 0.33
VIN DC INPUT VOLTAGE (V)
Figure 15. IDD1 vs. VIN at Various Temperatures
0.0070
0.0065
0.0060
MCLKIN = 16MHz
VDD1 = VDD2 = 5V
TA = 25°C
0.0055
0.0050
0.0045
MCLKIN = 10MHz
0.0040
0.0035
0.0030
MCLKIN = 5MHz
0.0025
0.0020
–0.325
–0.225
–0.125
–0.025
0.075
0.175
0.275
–0.275 –0.175 –0.075
0.025
0.125
0.225
0.325
VIN DC INPUT VOLTAGE (V)
Figure 16. IDD2 vs. VIN DC Input Voltage
0.0070
VDD1 = VDD2 = 5V
0.0065
0.0060
0.0055
0.0050
0.0045
MCLKIN = 16MHz
MCLKIN = 16MHz TA = +105°C MCLKIN = 16MHz
TA = –40°C
TA = +85°C
MCLKIN = 10MHz
TA = –40°C
MCLKIN = 10MHz
TA = +105°C
0.0040
0.0035
0.0030
MCLKIN = 10MHz
TA = +85°C
MCLKIN = 5MHz
TA = –40°C
0.0025
MCLKIN = 5MHz
MCLKIN = 5MHz
0.0020
TA = +85°C
TA = +105°C
–0.325
–0.225
–0.125
–0.025
0.075
0.175
0.275
–0.275 –0.175 –0.075
0.025
0.125
0.225
0.325
VIN DC INPUT VOLTAGE (V)
Figure 17. IDD2 vs. VIN at Various Temperatures
Rev. E | Page 10 of 20
11 Page | ||
| Páginas | Total 21 Páginas | |
| PDF Descargar | [ Datasheet AD7401.PDF ] | |
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