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기능 Energy Metering IC
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ADE7769 데이터시트, 핀배열, 회로
www.DataSheet4U.com
Energy Metering IC with Integrated
Oscillator and No-Load Indication
ADE7769
FEATURES
On-chip oscillator as clock source
High accuracy, supports 50 Hz/60 Hz IEC62053-21
Less than 0.1% error over a dynamic range of 500 to 1
Supplies average real power on frequency outputs F1 and F2
High frequency output CF calibrates and supplies
instantaneous real power
CF output remains logic high when ADE7769 is under
no-load threshold
Logic output REVP indicates a potential miswiring or
negative power
Direct drive for electromechanical counters and 2-phase
stepper motors (F1 and F2)
Proprietary ADCs and DSPs provide high accuracy over
large variations in environmental conditions and time
On-chip power supply monitoring
On-chip creep protection (no-load threshold)
On-chip reference 2.45 V (20 ppm/°C typical) with external
overdrive capability
Single 5 V supply, low power (20 mW typical)
Low cost CMOS process
GENERAL DESCRIPTION
The ADE77691 is a high accuracy electrical energy metering IC.
It is a pin reduction version of the ADE7755 with an enhanced,
precise oscillator circuit that serves as a clock source to the chip.
The ADE7769 eliminates the cost of an external crystal or
resonator, thus reducing the overall cost of a meter built with
this IC. The chip directly interfaces with the shunt resistor.
The ADE7769 specifications surpass the accuracy require-
ments of the IEC62053-21 standard. The AN-679 Application
Note can be used as a basis for a description of an IEC61036
(equivalent to IEC62053-21) low cost, watt-hour meter
reference design.
The only analog circuitry used in the ADE7769 is in the Σ-Δ
ADCs and reference circuit. All other signal processing, such as
multiplication and filtering, is carried out in the digital domain.
This approach provides superior stability and accuracy over
time and extreme environmental conditions.
The ADE7769 supplies average real power information on the
low frequency outputs, F1 and F2. These outputs can be used to
directly drive an electromechanical counter or interface with an
MCU. The high frequency CF logic output, ideal for calibration
purposes, provides instantaneous real power information.
The ADE7769 includes a power supply monitoring circuit on
the VDD supply pin. The ADE7769 remains inactive until the
supply voltage on VDD reaches approximately 4 V. If the supply
falls below 4 V, the ADE7769 also remains inactive and the F1,
F2, and CF outputs are in their nonactive modes.
Internal phase matching circuitry ensures that the voltage and
current channels are phase matched, while the HPF in the
current channel eliminates dc offsets. An internal no-load
threshold ensures that the ADE7769 does not exhibit creep
when no load is present. During a no-load condition, the CF
pin stays logic high.
1U.S. Patents 5,745,323; 5,760,617; 5,862,069; 5,872,469; others pending.
The ADE7769 has a 16-lead, narrow body SOIC package.
V2P 2
V2N 3
V1N 4
V1P 5
FUNCTIONAL BLOCK DIAGRAM
VDD
1
AGND
6
POWER
SUPPLY MONITOR
+ Σ-Δ ...110101...
ADC
ADE7769
DGND
13
MULTIPLIER
SIGNAL
PROCESSING
BLOCK
Σ-Δ
+ ADC
2.5V
4kΩ
REFERENCE
...11011001...
PHASE
CORRECTION
Φ
HPF
LPF
INTERNAL
OSCILLATOR
DIGITAL-TO-FREQUENCY
CONVERTER
7
REFIN/OUT
11
RCLKIN
8 10
SCF S0
Figure 1.
9 12 14
S1 REVP CF
16
F1
15
F2
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 © 2005 Analog Devices, Inc. All rights reserved.




ADE7769 pdf, 반도체, 판매, 대치품
ADE7769
Parameter
Value Unit
Test Conditions/Comments
POWER SUPPLY
For specified performance
VDD
4.75 V min
5 V – 5%
5.25 V max
5 V + 5%
IDD
5 mA max
Typically 4 mA
1 See the Terminology section for an explanation of specifications.
2 See the figures in the Typical Performance Characteristics section.
3 Sample tested during initial release and after any redesign or process change that may affect this parameter.
TIMING CHARACTERISTICS
VDD = 5 V ± 5%, AGND = DGND = 0 V, on-chip reference, RCLKIN = 6.2 kΩ, 0.5% ± 50 ppm/°C, TMIN to TMAX = −40°C to +85°C,
unless otherwise noted. Sample tested during initial release and after any redesign or process change that may affect this parameter.
See Figure 2.
Table 2.
Parameter
Specifications
Unit Test Conditions/Comments
t11 120
ms F1 and F2 pulse width (logic low).
t2
See Table 6
sec Output pulse period. See the Transfer Function section.
t3 1/2 t2 sec Time between the F1 and F2 falling edges.
t41, 2
90
ms CF pulse width (logic high).
t5
See Table 7
sec CF pulse period. See the Transfer Function section.
t6 2
μs Minimum time between the F1 and F2 pulses.
1 The pulse widths of F1, F2, and CF are not fixed for higher output frequencies. See the Frequency Outputs section.
2 The CF pulse is always 35 μs in high frequency mode. See the Frequency Outputs section and Table 7.
t1
F1
t6
t2
F2 t3
t4 t5
CF
Figure 2. Timing Diagram for Frequency Outputs
Rev. A | Page 4 of 20

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ADE7769 전자부품, 판매, 대치품
ADE7769
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
VDD 1
V2P 2
16 F1
15 F2
V2N 3 ADE7769 14 CF
V1N 4 TOP VIEW 13 DGND
V1P 5 (Not to Scale) 12 REVP
AGND 6
11 RCLKIN
REFIN/OUT 7
SCF 8
10 S0
9 S1
Figure 3. Pin Configuration
Table 4. Pin Function Descriptions
Pin No. Mnemonic Description
1 VDD
2, 3 V2P, V2N
4, 5 V1N, V1P
6 AGND
7 REFIN/OUT
8 SCF
9, 10 S1, S0
11 RCLKIN
Power Supply. This pin provides the supply voltage for the circuitry in the ADE7769. The supply voltage
should be maintained at 5 V ± 5% for specified operation. This pin should be decoupled with a 10 μF
capacitor in parallel with a 100 nF ceramic capacitor.
Analog Inputs for Channel V2 (Voltage Channel). These inputs provide a fully differential input pair. The
maximum differential input voltage is ±165 mV for specified operation. Both inputs have internal ESD
protection circuitry; an overvoltage of ±6 V can be sustained on these inputs without risk of permanent
damage.
Analog Inputs for Channel V1 (Current Channel). These inputs are fully differential voltage inputs with a
maximum signal level of ±30 mV with respect to the V1N pin for specified operation. Both inputs have
internal ESD protection circuitry and, in addition, an overvoltage of ±6 V can be sustained on these inputs
without risk of permanent damage.
This pin provides the ground reference for the analog circuitry in the ADE7769, that is, the ADCs and
reference. This pin should be tied to the analog ground plane of the PCB. The analog ground plane is the
ground reference for all analog circuitry, such as antialiasing filters, current and voltage sensors, and so forth.
For accurate noise suppression, the analog ground plane should be connected to the digital ground plane at
only one point. A star ground configuration helps to keep noisy digital currents away from the analog
circuits.
This pin provides access to the on-chip voltage reference. The on-chip reference has a nominal value of 2.45 V
and a typical temperature coefficient of 20 ppm/°C. An external reference source may also be connected at
this pin. In either case, this pin should be decoupled to AGND with a 1 μF tantalum capacitor and a 100 nF
ceramic capacitor. The internal reference cannot be used to drive an external load.
Select Calibration Frequency. This logic input is used to select the frequency on the calibration output CF. See
Table 7.
These logic inputs are used to select one of four possible frequencies for the digital-to-frequency conversion.
With this logic input, designers have greater flexibility when designing an energy meter. See the Selecting a
Frequency for an Energy Meter Application section.
To enable the internal oscillator as a clock source to the chip, a precise low temperature drift resistor at a
nominal value of 6.2 kΩ must be connected from this pin to DGND.
12 REVP
13 DGND
14 CF
15, 16 F2, F1
This logic output goes high when negative power is detected, that is, when the phase angle between the
voltage and current signals is greater than 90°. This output is not latched and is reset when positive power is
once again detected. The output goes high or low at the same time that a pulse is issued on CF.
This pin provides the ground reference for the digital circuitry in the ADE7769, that is, the multiplier, filters,
and digital-to-frequency converter. This pin should be tied to the digital ground plane of the PCB. The digital
ground plane is the ground reference for all digital circuitry, such as the counters (mechanical and digital),
MCUs, and indicator LEDs. For accurate noise suppression, the analog ground plane should be connected to
the digital ground plane at one point only—a star ground.
Calibration Frequency Logic Output. The CF logic output provides instantaneous real power information. This
output is intended for calibration purposes. See the SCF pin description. This output stays high when the part
is in a no-load condition.
Low Frequency Logic Outputs. F1 and F2 supply average real power information. The logic outputs can be
used to directly drive electromechanical counters and 2-phase stepper motors. See the Transfer Function
section.
Rev. A | Page 7 of 20

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