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56F8365 데이터시트 PDF




Freescale Semiconductor에서 제조한 전자 부품 56F8365은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


 

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부품번호 56F8365 기능
기능 (56F8365 / 56F8165) 16-bit Digital Signal Controllers
제조업체 Freescale Semiconductor
로고 Freescale Semiconductor 로고


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56F8365 데이터시트, 핀배열, 회로
www.DataSheet4U.com
56F8365/56F8165
Data Sheet
Preliminary Technical Data
56F8300
16-bit Digital Signal Controllers
MC56F8365
Rev. 6.0
06/2006
freescale.com




56F8365 pdf, 반도체, 판매, 대치품
Table of Contents
Part 1: Overview . . . . . . . . . . . . . . . . . . . . . . . 5
1.1. 56F8365/56F8165 Features . . . . . . . . . . . . . 5
1.2. Device Description . . . . . . . . . . . . . . . . . . . . 7
1.3. Award-Winning Development Environment . 9
1.4. Architecture Block Diagram . . . . . . . . . . . . 10
1.5. Product Documentation . . . . . . . . . . . . . . . 14
1.6. Data Sheet Conventions . . . . . . . . . . . . . . 14
Part 2: Signal/Connection Descriptions . . . 15
2.1. Introduction . . . . . . . . . . . . . . . . . . . . . . . . . 15
2.2. Signal Pins . . . . . . . . . . . . . . . . . . . . . . . . . 18
Part 3: On-Chip Clock Synthesis (OCCS) . . 34
3.1. Introduction . . . . . . . . . . . . . . . . . . . . . . . . . 34
3.2. External Clock Operation . . . . . . . . . . . . . . 34
3.3. Registers . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Part 4: Memory Map . . . . . . . . . . . . . . . . . . . 36
4.1. Introduction . . . . . . . . . . . . . . . . . . . . . . . . . 36
4.2. Program Map . . . . . . . . . . . . . . . . . . . . . . . 37
4.3. Interrupt Vector Table . . . . . . . . . . . . . . . . . 39
4.4. Data Map . . . . . . . . . . . . . . . . . . . . . . . . . . 42
4.5. Flash Memory Map . . . . . . . . . . . . . . . . . . . 43
4.6. EOnCE Memory Map . . . . . . . . . . . . . . . . . 44
4.7. Peripheral Memory Mapped Registers . . . . 45
4.8. Factory Programmed Memory . . . . . . . . . . 76
Part 5: Interrupt Controller (ITCN) . . . . . . . . 77
5.1. Introduction . . . . . . . . . . . . . . . . . . . . . . . . . 77
5.2. Features . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
5.3. Functional Description . . . . . . . . . . . . . . . . 77
5.4. Block Diagram . . . . . . . . . . . . . . . . . . . . . . 79
5.5. Operating Modes . . . . . . . . . . . . . . . . . . . . 79
5.6. Register Descriptions . . . . . . . . . . . . . . . . . 80
5.7. Resets . . . . . . . . . . . . . . . . . . . . . . . . . . . 107
Part 6: System Integration Module (SIM) . 108
6.1. Introduction . . . . . . . . . . . . . . . . . . . . . . . . 108
6.2. Features . . . . . . . . . . . . . . . . . . . . . . . . . . 108
6.3. Operating Modes . . . . . . . . . . . . . . . . . . . 109
6.4. Operating Mode Register . . . . . . . . . . . . . 109
6.5. Register Descriptions . . . . . . . . . . . . . . . . 110
6.6. Clock Generation Overview . . . . . . . . . . . 125
6.7. Power-Down Modes Overview . . . . . . . . . 125
6.8. Stop and Wait Mode Disable Function . . . 126
6.9. Resets . . . . . . . . . . . . . . . . . . . . . . . . . . . 126
Part 7: Security Features . . . . . . . . . . . . . . 127
7.1. Operation with Security Enabled . . . . . . . 127
7.2. Flash Access Blocking Mechanisms . . . . 127
Part 8: General Purpose Input/Output
(GPIO) . . . . . . . . . . . . . . . . . . . . . . . 130
8.1. Introduction . . . . . . . . . . . . . . . . . . . . . . . . 130
8.2. Memory Maps . . . . . . . . . . . . . . . . . . . . . . 130
8.3. Configuration . . . . . . . . . . . . . . . . . . . . . . . 130
Part 9: Joint Test Action Group (JTAG) . 135
9.1. JTAG Information . . . . . . . . . . . . . . . . . . . . 135
Part 10: Specifications . . . . . . . . . . . . . . . 136
10.1. General Characteristics . . . . . . . . . . . . . . 136
10.2. DC Electrical Characteristics . . . . . . . . . . 140
10.3. AC Electrical Characteristics . . . . . . . . . . 144
10.4. Flash Memory Characteristics . . . . . . . . . 144
10.5. External Clock Operation Timing . . . . . . . 145
10.6. Phase Locked Loop Timing . . . . . . . . . . . 145
10.7. Crystal Oscillator Timing . . . . . . . . . . . . . 146
10.8. Reset, Stop, Wait, Mode Select, and
Interrupt Timing . . . . . . . . . . . . . . 146
10.9. Serial Peripheral Interface (SPI) Timing . 149
10.10. Quad Timer Timing . . . . . . . . . . . . . . . . 152
10.11. Quadrature Decoder Timing . . . . . . . . . . 152
10.12. Serial Communication Interface (SCI)
Timing . . . . . . . . . . . . . . . . . . . . . 153
10.13. Controller Area Network (CAN)
Timing . . . . . . . . . . . . . . . . . . . . . 154
10.14. JTAG Timing . . . . . . . . . . . . . . . . . . . . . 154
10.15. Analog-to-Digital Converter (ADC)
Parameters . . . . . . . . . . . . . . . . . 156
10.16. Equivalent Circuit for ADC Inputs . . . . . 159
10.17. Power Consumption . . . . . . . . . . . . . . . . 159
Part 11: Packaging . . . . . . . . . . . . . . . . . . . 161
11.1. 56F8365 Package and Pin-Out
Information . . . . . . . . . . . . . . . . . . 161
11.2. 56F8165 Package and Pin-Out
Information . . . . . . . . . . . . . . . . . . 164
Part 12: Design Considerations . . . . . . . . 168
12.1. Thermal Design Considerations . . . . . . . . 168
12.2. Electrical Design Considerations . . . . . . . 169
12.3. Power Distribution and I/O Ring
Implementation . . . . . . . . . . . . . . 170
Part 13: Ordering Information . . . . . . . . . 171
56F8365 Technical Data, Rev. 6.0
4 Freescale Semiconductor
Preliminary

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56F8365 전자부품, 판매, 대치품
Device Description
• Two dedicated external interrupt pins
• 49 General Purpose I/O (GPIO) pins; 28 pins dedicated to GPIO
• External reset input pin for hardware reset
• External reset output pin for system reset
• Integrated low-voltage interrupt module
• JTAG/Enhanced On-Chip Emulation (OnCE) for unobtrusive, processor speed-independent, real-time
debugging
• Software-programmable, Phase Lock Loop (PLL)-based frequency synthesizer for the core clock
1.1.5 Energy Information
• Fabricated in high-density CMOS with 5V-tolerant, TTL-compatible digital inputs
• On-board 3.3V down to 2.6V voltage regulator for powering internal logic and memories; can be disabled
• On-chip regulators for digital and analog circuitry to lower cost and reduce noise
• Wait and Stop modes available
• ADC smart power management
• Each peripheral can be individually disabled to save power
1.2 Device Description
The 56F8365 and 56F8165 are members of the 56800E core-based family of controllers. Each combines,
on a single chip, the processing power of a Digital Signal Processor (DSP) and the functionality of a
microcontroller with a flexible set of peripherals to create an extremely cost-effective solution. Because
of their low cost, configuration flexibility, and compact program code, the 56F8365 and 56F8165 are
well-suited for many applications. The devices include many peripherals that are especially useful for
motion control, smart appliances, steppers, encoders, tachometers, limit switches, power supply and
control, automotive control (56F8365 only), engine management, noise suppression, remote utility
metering, industrial control for power, lighting, and automation applications.
The 56800E core is based on a Harvard-style architecture consisting of three execution units operating in
parallel, allowing as many as six operations per instruction cycle. The MCU-style programming model and
optimized instruction set allow straightforward generation of efficient, compact DSP and control code.
The instruction set is also highly efficient for C/C++ Compilers to enable rapid development of optimized
control applications.
The 56F8365 and 56F8165 support program execution from internal memories. Two data operands can be
accessed from the on-chip data RAM per instruction cycle. These devices also provide two external
dedicated interrupt lines and up to 49 General Purpose Input/Output (GPIO) lines, depending on peripheral
configuration.
1.2.1 56F8365 Features
The 56F8365 controller includes 512KB of Program Flash and 32KB of Data Flash (each programmable
through the JTAG port) with 4KB of Program RAM and 32KB of Data RAM. A total of 32KB of Boot
Flash is incorporated for easy customer inclusion of field-programmable software routines that can be used
Freescale Semiconductor
Preliminary
56F8365 Technical Data, Rev. 6.0
7

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관련 데이터시트

부품번호상세설명 및 기능제조사
56F8365

(56F8365 / 56F8165) 16-bit Digital Signal Controllers

Freescale Semiconductor
Freescale Semiconductor
56F8366

(56F8166 / 56F8366) 16-bit Digital Signal Controllers

Freescale Semiconductor
Freescale Semiconductor

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