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AT3210 데이터시트 PDF




Aimtron Technology에서 제조한 전자 부품 AT3210은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


 

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부품번호 AT3210 기능
기능 16 GrayScales 160X160 STN LCD Controller
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AT3210 데이터시트, 핀배열, 회로
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AT3210
Preliminary Product Information
16 GrayScales 160X160 STN LCD Controller
AT3210
16 Gray scales 160X160 STN LCD
Controller
REV 1.11
February 2002
Aimtron reserves the right without notice to change this circuitry and specifications.
AIMTRON TECHNOLOGY CORP.
2F,NO.10, Prosperity Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R.O.C
Homepage:http://www.aimtron.com.tw
Tel: 886-3-563-0878
Fax: 886-3-563-0879
Rev 1.11 Feb. 2002
1




AT3210 pdf, 반도체, 판매, 대치품
AT3210
Preliminary Product Information
16 GrayScales 160X160 STN LCD Controller
System Block Diagram
6800 series
MPU
CS1
CS*
RS
E
RW
DB7-0
AT3210
RESET
FPSHIFT
FPLINE
FPFRAME
MOD
FPDATA4-0
STN LCD
8080 series
MPU
Fig 1. 6800 series MPU interface application
CS1
CS*
RS
WR*
RD*
DB7-0
AT3210
RESET
FPSHIFT
FPLINE
FPFRAME
MOD
FPDATA4-0
STN LCD
Fig 2. 8080 series MPU interface application
3.3V
DSC
Controller
AT3210
Re
STN LCD
COLUMN DRIVER
V2 V3 V4
V5
VLCD
-+ -+ -+ -+
RRRRR
Contrast Adjust
Fig 3. DSC system reference design
AIMTRON TECHNOLOGY CORP.
2F,NO.10, Prosperity Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R.O.C
Homepage:http://www.aimtron.com.tw
Tel: 886-3-563-0878
Fax: 886-3-563-0879
Rev 1.11 Feb. 2002
4

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AT3210 전자부품, 판매, 대치품
AT3210
Preliminary Product Information
16 GrayScales 160X160 STN LCD Controller
MPU interface
The chip identifies the data bus signals by a combination of RS, RD(E), WR(RW) signals.
The Interpretation and execution of command depends on the external clock.
In the 8080 MPU interface, commands are launched by inputting a low pulse to the RD
terminal for reading, and inputting a low pulse to the WR terminal for writing. In the 6800 series
MPU interface, the interface is placed in a read mode when an ‘H’ signal is input to the RW
terminal and placed in a write mode when a ‘L’ signal is input to the R/W terminal and then the
command is launched by inputting a high pulse to the E terminal. (See the timming diagram
regarding the timing.) When the serial interface is selected, the data is input in sequence
starting with D7.
The MPU data bus is used as the display data input when the RS pin is ‘1’. The
interpretation of the data format depends on the DFORMAT command. If DFORMAT=0, the
high nibble is the first pixel and the low nibble is the second pixel. If DFORMAT=1, the high
nibble is the second pixel and the low nibble is the first pixel. If DFORMAT=2, the high nibble
is the current pixel data and the low nibble is don’t care. If DFORMAT=3, the low nibble is the
current pixel data and the high nibble is don’t care. Each MPU write cycle latches 2 pixel data
when DFORMAT=0 or 1and 1 pixel data when DFORMAT=2 or 3. See Fig.6 and Fig. 7. The
internal RAM will write these data only after 32 bits data is latched
The write pulses of the MPU must be the multiples of 4 or 8 which depends on the
DFORMAT. The read pulses of the MPU must be the multiples of 4 which is independant of
the DFORMAT. If you want to read data from memory, one dummy read cycle must be
asserted before the wanted data output. The first read/write data is determined by the internal
row and column counter. See Fig. 8.
The input/output direction of the MPU data bus is determined by the read/write operation.
The data bus is at input state when the AT3210 detects a write operation. The data bus is at
output state when the AT3210 detects a read operation. See Fig. 14. Note that the output state
after a read operation will hold until the next write operation is detected.
AIMTRON TECHNOLOGY CORP.
2F,NO.10, Prosperity Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R.O.C
Homepage:http://www.aimtron.com.tw
Tel: 886-3-563-0878
Fax: 886-3-563-0879
Rev 1.11 Feb. 2002
7

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